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Arkadiusz Karas5b6f8f32020-01-02 19:31:21 +01001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright (C) 2017-2019 A. Karas, SomLabs
4 * Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
5 *
6 * Configuration settings for the SoMlabs VisionSOM 6ULL board.
7 */
8#ifndef __SOMLABS_VISIONSOM_6ULL_H
9#define __SOMLABS_VISIONSOM_6ULL_H
10
11#include <asm/arch/imx-regs.h>
12#include <linux/sizes.h>
13#include "mx6_common.h"
14#include <asm/mach-imx/gpio.h>
15
16/* SPL options */
17#include "imx6_spl.h"
18
19/* Size of malloc() pool */
20#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
21
22#define CONFIG_MXC_UART
23#define CONFIG_MXC_UART_BASE UART1_BASE
24
25/* MMC Configs */
26#ifdef CONFIG_FSL_USDHC
27#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
28
29#define CONFIG_SYS_FSL_USDHC_NUM 1
30#endif /* CONFIG_FSL_USDHC */
31
Arkadiusz Karas5b6f8f32020-01-02 19:31:21 +010032#define CONFIG_EXTRA_ENV_SETTINGS \
33 "bootm_size=0x10000000\0" \
34 "console=ttymxc0\0" \
35 "initrd_addr=0x86800000\0" \
36 "fdt_addr=0x83000000\0" \
37 "script=boot.scr\0" \
38 "image=zImage\0" \
39 "splashimage=0x80000000\0" \
40 "splashfile=/boot/splash.bmp\0" \
41 "mmcdev=1\0" \
42 "mmcpart=1\0" \
43 "mmcroot=/dev/mmcblk1p1 rootwait rw\0" \
44 "setrootmmc=setenv rootspec root=${mmcroot}\0" \
45 "setbootscriptmmc=setenv loadbootscript " \
46 "load mmc ${mmcdev}:${mmcpart} " \
47 "${loadaddr} /boot/${script};\0" \
48 "setloadmmc=setenv loadimage load mmc ${mmcdev}:${mmcpart} " \
49 "${loadaddr} /boot/${image}; " \
50 "setenv loadfdt load mmc ${mmcdev}:${mmcpart} " \
51 "${fdt_addr} /boot/${fdt_file};\0" \
52 "setbootargs=setenv bootargs console=${console},${baudrate} " \
53 "${rootspec}\0" \
54 "execbootscript=echo Running bootscript...; source\0" \
55 "setfdtfile=setenv fdt_file somlabs-visionsom-6ull.dtb\0" \
56 "checkbootdev=run setbootscriptmmc; " \
57 "run setrootmmc; " \
58 "run setloadmmc; " \
59
60#define CONFIG_BOOTCOMMAND \
61 "run setfdtfile; " \
62 "run checkbootdev; " \
63 "run loadfdt;" \
64 "if run loadbootscript; then " \
65 "run bootscript; " \
66 "else " \
67 "if run loadimage; then " \
68 "run setbootargs; " \
69 "bootz ${loadaddr} - ${fdt_addr}; " \
70 "fi; " \
71 "fi"
72
73/* Miscellaneous configurable options */
Arkadiusz Karas5b6f8f32020-01-02 19:31:21 +010074
75#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
76#define CONFIG_SYS_HZ 1000
77
78/* Physical Memory Map */
79#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
80
81#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
82#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
83#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
84
85#define CONFIG_SYS_INIT_SP_OFFSET \
86 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
87#define CONFIG_SYS_INIT_SP_ADDR \
88 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
89
90/* environment organization */
91#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
92#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
93
94/* USB Configs */
95#ifdef CONFIG_CMD_USB
96#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
97#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
98#define CONFIG_MXC_USB_FLAGS 0
99#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
100#endif
101
102#ifdef CONFIG_CMD_NET
103#define CONFIG_FEC_MXC
104#define IMX_FEC_BASE ENET_BASE_ADDR
105#define CONFIG_FEC_MXC_PHYADDR 0x1
106#define CONFIG_FEC_XCV_TYPE RMII
107#define CONFIG_ETHPRIME "eth0"
108#endif
109
110#define CONFIG_IMX_THERMAL
111
112#endif