blob: 49ba6916398c5a80342160e663f06003bd6524b1 [file] [log] [blame]
Simon Glass6caa1952013-05-08 08:06:03 +00001/*
2 * Copyright (c) 2013, Google Inc.
3 *
4 * Copyright (C) 2011
5 * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
6 * - Added prep subcommand support
7 * - Reorganized source - modeled after powerpc version
8 *
9 * (C) Copyright 2002
10 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
11 * Marius Groeger <mgroeger@sysgo.de>
12 *
13 * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
14 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020015 * SPDX-License-Identifier: GPL-2.0+
Simon Glass6caa1952013-05-08 08:06:03 +000016 */
17
18#include <common.h>
19#include <fdt_support.h>
Tom Rinidd09f7e2015-03-05 20:19:36 -050020#include <asm/psci.h>
Simon Glass6caa1952013-05-08 08:06:03 +000021
22DECLARE_GLOBAL_DATA_PTR;
23
Ma Haijune29607e2014-07-12 14:24:06 +010024int arch_fixup_fdt(void *blob)
Simon Glass6caa1952013-05-08 08:06:03 +000025{
26 bd_t *bd = gd->bd;
Marc Zyngiere771a3d2014-07-12 14:24:07 +010027 int bank, ret;
Simon Glass6caa1952013-05-08 08:06:03 +000028 u64 start[CONFIG_NR_DRAM_BANKS];
29 u64 size[CONFIG_NR_DRAM_BANKS];
30
31 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
32 start[bank] = bd->bi_dram[bank].start;
33 size[bank] = bd->bi_dram[bank].size;
34 }
35
Marc Zyngiere771a3d2014-07-12 14:24:07 +010036 ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
Jan Kiszka104d6fb2015-04-21 07:18:24 +020037#ifdef CONFIG_ARMV7_NONSEC
Marc Zyngiere771a3d2014-07-12 14:24:07 +010038 if (ret)
39 return ret;
40
Tom Rinidd09f7e2015-03-05 20:19:36 -050041 ret = psci_update_dt(blob);
Marc Zyngiere771a3d2014-07-12 14:24:07 +010042#endif
43 return ret;
Simon Glass6caa1952013-05-08 08:06:03 +000044}