Wolfgang Denk | 0e4018d | 2005-09-26 01:14:38 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2001 |
| 3 | * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net |
| 4 | * |
| 5 | * (C) Copyright 2001 |
| 6 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 7 | * |
| 8 | * Modified for the MP2USB by (C) Copyright 2005 Eric Benard |
| 9 | * ebenard@eukrea.com |
| 10 | * |
| 11 | * See file CREDITS for list of people who contributed to this |
| 12 | * project. |
| 13 | * |
| 14 | * This program is free software; you can redistribute it and/or |
| 15 | * modify it under the terms of the GNU General Public License as |
| 16 | * published by the Free Software Foundation; either version 2 of |
| 17 | * the License, or (at your option) any later version. |
| 18 | * |
| 19 | * This program is distributed in the hope that it will be useful, |
| 20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 22 | * GNU General Public License for more details. |
| 23 | * |
| 24 | * You should have received a copy of the GNU General Public License |
| 25 | * along with this program; if not, write to the Free Software |
| 26 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 27 | * MA 02111-1307 USA |
| 28 | */ |
| 29 | |
| 30 | #include <common.h> |
| 31 | #include <linux/byteorder/swab.h> |
| 32 | |
| 33 | #define CFG_MAX_FLASH_BANKS 1 |
| 34 | #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */ |
| 35 | |
| 36 | flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
| 37 | |
| 38 | #define FLASH_PORT_WIDTH ushort |
| 39 | #define FLASH_PORT_WIDTHV vu_short |
| 40 | #define SWAP(x) __swab16(x) |
| 41 | |
| 42 | #define FPW FLASH_PORT_WIDTH |
| 43 | #define FPWV FLASH_PORT_WIDTHV |
| 44 | |
| 45 | #define mb() __asm__ __volatile__ ("" : : : "memory") |
| 46 | |
| 47 | /* Intel-compatible flash commands */ |
| 48 | #define INTEL_PROGRAM 0x00100010 |
| 49 | #define INTEL_ERASE 0x00200020 |
| 50 | #define INTEL_PROG 0x00400040 |
| 51 | #define INTEL_CLEAR 0x00500050 |
| 52 | #define INTEL_LOCKBIT 0x00600060 |
| 53 | #define INTEL_PROTECT 0x00010001 |
| 54 | #define INTEL_STATUS 0x00700070 |
| 55 | #define INTEL_READID 0x00900090 |
| 56 | #define INTEL_SUSPEND 0x00B000B0 |
| 57 | #define INTEL_CONFIRM 0x00D000D0 |
| 58 | #define INTEL_RESET 0xFFFFFFFF |
| 59 | |
| 60 | /* Intel-compatible flash status bits */ |
| 61 | #define INTEL_FINISHED 0x00800080 |
| 62 | #define INTEL_OK 0x00800080 |
| 63 | |
| 64 | /*----------------------------------------------------------------------- |
| 65 | * Functions |
| 66 | */ |
| 67 | static ulong flash_get_size (FPW *addr, flash_info_t *info); |
| 68 | static int write_data (flash_info_t *info, ulong dest, FPW data); |
| 69 | static void flash_get_offsets (ulong base, flash_info_t *info); |
| 70 | void inline spin_wheel (void); |
| 71 | |
| 72 | /*----------------------------------------------------------------------- |
| 73 | */ |
| 74 | |
| 75 | unsigned long flash_init (void) |
| 76 | { |
| 77 | int i; |
| 78 | ulong size = 0; |
| 79 | |
| 80 | for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { |
| 81 | switch (i) { |
| 82 | case 0: |
| 83 | flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]); |
| 84 | flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); |
| 85 | break; |
| 86 | default: |
| 87 | panic ("configured too many flash banks!\n"); |
| 88 | break; |
| 89 | } |
| 90 | size += flash_info[i].size; |
| 91 | } |
| 92 | |
| 93 | /* Protect monitor and environment sectors |
| 94 | */ |
| 95 | flash_protect ( FLAG_PROTECT_SET, |
| 96 | CFG_FLASH_BASE, |
| 97 | CFG_FLASH_BASE + monitor_flash_len - 1, |
| 98 | &flash_info[0] ); |
| 99 | |
| 100 | flash_protect ( FLAG_PROTECT_SET, |
| 101 | CFG_ENV_ADDR, |
| 102 | CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0] ); |
| 103 | |
| 104 | return size; |
| 105 | } |
| 106 | |
| 107 | /*----------------------------------------------------------------------- |
| 108 | */ |
| 109 | static void flash_get_offsets (ulong base, flash_info_t *info) |
| 110 | { |
| 111 | int i; |
| 112 | |
| 113 | if (info->flash_id == FLASH_UNKNOWN) { |
| 114 | return; |
| 115 | } |
| 116 | |
| 117 | if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { |
| 118 | for (i = 0; i < info->sector_count; i++) { |
| 119 | info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE); |
| 120 | info->protect[i] = 0; |
| 121 | } |
| 122 | } |
| 123 | } |
| 124 | |
| 125 | /*----------------------------------------------------------------------- |
| 126 | */ |
| 127 | void flash_print_info (flash_info_t *info) |
| 128 | { |
| 129 | int i; |
| 130 | |
| 131 | if (info->flash_id == FLASH_UNKNOWN) { |
| 132 | printf ("missing or unknown FLASH type\n"); |
| 133 | return; |
| 134 | } |
| 135 | |
| 136 | switch (info->flash_id & FLASH_VENDMASK) { |
| 137 | case FLASH_MAN_INTEL: |
| 138 | printf ("INTEL "); |
| 139 | break; |
| 140 | default: |
| 141 | printf ("Unknown Vendor "); |
| 142 | break; |
| 143 | } |
| 144 | |
| 145 | switch (info->flash_id & FLASH_TYPEMASK) { |
| 146 | case FLASH_28F640J3A: |
| 147 | printf ("28F640J3A\n"); |
| 148 | break; |
| 149 | case FLASH_28F128J3A: |
| 150 | printf ("28F128J3A\n"); |
| 151 | break; |
| 152 | default: |
| 153 | printf ("Unknown Chip Type\n"); |
| 154 | break; |
| 155 | } |
| 156 | |
| 157 | printf (" Size: %ld MB in %d Sectors\n", |
| 158 | info->size >> 20, info->sector_count); |
| 159 | |
| 160 | printf (" Sector Start Addresses:"); |
| 161 | for (i = 0; i < info->sector_count; ++i) { |
| 162 | if ((i % 5) == 0) |
| 163 | printf ("\n "); |
| 164 | printf (" %08lX%s", |
| 165 | info->start[i], |
| 166 | info->protect[i] ? " (RO)" : " "); |
| 167 | } |
| 168 | printf ("\n"); |
| 169 | return; |
| 170 | } |
| 171 | |
| 172 | /* |
| 173 | * The following code cannot be run from FLASH! |
| 174 | */ |
| 175 | static ulong flash_get_size (FPW *addr, flash_info_t *info) |
| 176 | { |
| 177 | volatile FPW value; |
| 178 | |
| 179 | /* Write auto select command: read Manufacturer ID */ |
| 180 | addr[0x5555] = (FPW) 0x00AA00AA; |
| 181 | addr[0x2AAA] = (FPW) 0x00550055; |
| 182 | addr[0x5555] = (FPW) 0x00900090; |
| 183 | |
| 184 | mb (); |
| 185 | value = addr[0]; |
| 186 | |
| 187 | switch (value) { |
| 188 | |
| 189 | case (FPW) INTEL_MANUFACT: |
| 190 | info->flash_id = FLASH_MAN_INTEL; |
| 191 | break; |
| 192 | |
| 193 | default: |
| 194 | info->flash_id = FLASH_UNKNOWN; |
| 195 | info->sector_count = 0; |
| 196 | info->size = 0; |
| 197 | addr[0] = (FPW) INTEL_RESET; /* restore read mode */ |
| 198 | return (0); /* no or unknown flash */ |
| 199 | } |
| 200 | |
| 201 | mb (); |
| 202 | value = addr[1]; /* device ID */ |
| 203 | |
| 204 | switch (value) { |
| 205 | |
| 206 | case (FPW) INTEL_ID_28F640J3A: |
| 207 | info->flash_id += FLASH_28F640J3A; |
| 208 | info->sector_count = 64; |
| 209 | info->size = 0x00800000; |
| 210 | break; /* => 8 MB */ |
| 211 | |
| 212 | case (FPW) INTEL_ID_28F128J3A: |
| 213 | info->flash_id += FLASH_28F128J3A; |
| 214 | info->sector_count = 128; |
| 215 | info->size = 0x01000000; |
| 216 | break; /* => 16 MB */ |
| 217 | |
| 218 | default: |
| 219 | info->flash_id = FLASH_UNKNOWN; |
| 220 | break; |
| 221 | } |
| 222 | |
| 223 | if (info->sector_count > CFG_MAX_FLASH_SECT) { |
| 224 | printf ("** ERROR: sector count %d > max (%d) **\n", |
| 225 | info->sector_count, CFG_MAX_FLASH_SECT); |
| 226 | info->sector_count = CFG_MAX_FLASH_SECT; |
| 227 | } |
| 228 | |
| 229 | addr[0] = (FPW) INTEL_RESET; /* restore read mode */ |
| 230 | |
| 231 | return (info->size); |
| 232 | } |
| 233 | |
| 234 | |
| 235 | /*----------------------------------------------------------------------- |
| 236 | */ |
| 237 | |
| 238 | int flash_erase (flash_info_t *info, int s_first, int s_last) |
| 239 | { |
Wolfgang Denk | 080bdb7 | 2005-10-05 01:51:29 +0200 | [diff] [blame] | 240 | int prot, sect; |
Wolfgang Denk | 0e4018d | 2005-09-26 01:14:38 +0200 | [diff] [blame] | 241 | ulong type, start, last; |
| 242 | int rcode = 0; |
| 243 | int cflag, iflag; |
| 244 | |
| 245 | if ((s_first < 0) || (s_first > s_last)) { |
| 246 | if (info->flash_id == FLASH_UNKNOWN) { |
| 247 | printf ("- missing\n"); |
| 248 | } else { |
| 249 | printf ("- no sectors to erase\n"); |
| 250 | } |
| 251 | return 1; |
| 252 | } |
| 253 | |
| 254 | type = (info->flash_id & FLASH_VENDMASK); |
| 255 | if ((type != FLASH_MAN_INTEL)) { |
| 256 | printf ("Can't erase unknown flash type %08lx - aborted\n", |
| 257 | info->flash_id); |
| 258 | return 1; |
| 259 | } |
| 260 | |
| 261 | prot = 0; |
| 262 | for (sect = s_first; sect <= s_last; ++sect) { |
| 263 | if (info->protect[sect]) { |
| 264 | prot++; |
| 265 | } |
| 266 | } |
| 267 | |
| 268 | if (prot) { |
| 269 | printf ("- Warning: %d protected sectors will not be erased!\n", |
| 270 | prot); |
| 271 | } else { |
| 272 | printf ("\n"); |
| 273 | } |
| 274 | |
| 275 | start = get_timer (0); |
| 276 | last = start; |
| 277 | |
| 278 | /* |
| 279 | * Disable interrupts which might cause a timeout |
| 280 | * here. Remember that our exception vectors are |
| 281 | * at address 0 in the flash, and we don't want a |
| 282 | * (ticker) exception to happen while the flash |
| 283 | * chip is in programming mode. |
| 284 | */ |
| 285 | cflag = icache_status (); |
| 286 | icache_disable (); |
Wolfgang Denk | 0e4018d | 2005-09-26 01:14:38 +0200 | [diff] [blame] | 287 | /* Disable interrupts which might cause a timeout here */ |
Wolfgang Denk | 080bdb7 | 2005-10-05 01:51:29 +0200 | [diff] [blame] | 288 | iflag = disable_interrupts (); |
Wolfgang Denk | 0e4018d | 2005-09-26 01:14:38 +0200 | [diff] [blame] | 289 | |
| 290 | /* Start erase on unprotected sectors */ |
| 291 | for (sect = s_first; sect <= s_last; sect++) { |
| 292 | if (info->protect[sect] == 0) { /* not protected */ |
| 293 | FPWV *addr = (FPWV *) (info->start[sect]); |
| 294 | FPW status; |
| 295 | |
| 296 | printf ("Erasing sector %2d ... ", sect); |
| 297 | |
| 298 | /* arm simple, non interrupt dependent timer */ |
| 299 | reset_timer_masked (); |
| 300 | |
| 301 | *addr = (FPW) INTEL_CLEAR; /* clear status register */ |
| 302 | *addr = (FPW) INTEL_ERASE; /* erase setup */ |
| 303 | *addr = (FPW) INTEL_CONFIRM; /* erase confirm */ |
| 304 | |
| 305 | while (((status = *addr) & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) { |
| 306 | if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) { |
| 307 | printf ("Timeout\n"); |
| 308 | *addr = (FPW) INTEL_SUSPEND; /* suspend erase */ |
| 309 | *addr = (FPW) INTEL_RESET; /* reset to read mode */ |
| 310 | rcode = 1; |
| 311 | break; |
| 312 | } |
| 313 | } |
| 314 | |
Wolfgang Denk | 080bdb7 | 2005-10-05 01:51:29 +0200 | [diff] [blame] | 315 | *addr = (FPWV)INTEL_CLEAR; /* clear status register cmd. */ |
| 316 | *addr = (FPWV)INTEL_RESET; /* resest to read mode */ |
Wolfgang Denk | 0e4018d | 2005-09-26 01:14:38 +0200 | [diff] [blame] | 317 | |
| 318 | printf (" done\n"); |
| 319 | } |
| 320 | } |
| 321 | |
| 322 | if (iflag) |
| 323 | enable_interrupts (); |
| 324 | |
| 325 | if (cflag) |
| 326 | icache_enable (); |
| 327 | |
| 328 | return rcode; |
| 329 | } |
| 330 | |
| 331 | /*----------------------------------------------------------------------- |
| 332 | * Copy memory to flash, returns: |
| 333 | * 0 - OK |
| 334 | * 1 - write timeout |
| 335 | * 2 - Flash not erased |
| 336 | * 4 - Flash not identified |
| 337 | */ |
| 338 | |
| 339 | int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) |
| 340 | { |
| 341 | ulong cp, wp; |
| 342 | FPW data; |
| 343 | int count, i, l, rc, port_width; |
| 344 | |
| 345 | if (info->flash_id == FLASH_UNKNOWN) { |
| 346 | return 4; |
| 347 | } |
| 348 | |
| 349 | /* get lower word aligned address */ |
| 350 | wp = (addr & ~1); |
| 351 | port_width = 2; |
| 352 | |
| 353 | /* |
| 354 | * handle unaligned start bytes |
| 355 | */ |
| 356 | if ((l = addr - wp) != 0) { |
| 357 | data = 0; |
| 358 | for (i = 0, cp = wp; i < l; ++i, ++cp) { |
| 359 | data = (data << 8) | (*(uchar *) cp); |
| 360 | } |
| 361 | for (; i < port_width && cnt > 0; ++i) { |
| 362 | data = (data << 8) | *src++; |
| 363 | --cnt; |
| 364 | ++cp; |
| 365 | } |
| 366 | for (; cnt == 0 && i < port_width; ++i, ++cp) { |
| 367 | data = (data << 8) | (*(uchar *) cp); |
| 368 | } |
| 369 | |
| 370 | if ((rc = write_data (info, wp, SWAP (data))) != 0) { |
| 371 | return (rc); |
| 372 | } |
| 373 | wp += port_width; |
| 374 | } |
| 375 | |
| 376 | /* |
| 377 | * handle word aligned part |
| 378 | */ |
| 379 | count = 0; |
| 380 | while (cnt >= port_width) { |
| 381 | data = 0; |
| 382 | for (i = 0; i < port_width; ++i) { |
| 383 | data = (data << 8) | *src++; |
| 384 | } |
| 385 | if ((rc = write_data (info, wp, SWAP (data))) != 0) { |
| 386 | return (rc); |
| 387 | } |
| 388 | wp += port_width; |
| 389 | cnt -= port_width; |
| 390 | if (count++ > 0x800) { |
| 391 | spin_wheel (); |
| 392 | count = 0; |
| 393 | } |
| 394 | } |
| 395 | |
| 396 | if (cnt == 0) { |
| 397 | return (0); |
| 398 | } |
| 399 | |
| 400 | /* |
| 401 | * handle unaligned tail bytes |
| 402 | */ |
| 403 | data = 0; |
| 404 | for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { |
| 405 | data = (data << 8) | *src++; |
| 406 | --cnt; |
| 407 | } |
| 408 | for (; i < port_width; ++i, ++cp) { |
| 409 | data = (data << 8) | (*(uchar *) cp); |
| 410 | } |
| 411 | |
| 412 | return (write_data (info, wp, SWAP (data))); |
| 413 | } |
| 414 | |
| 415 | /*----------------------------------------------------------------------- |
| 416 | * Write a word or halfword to Flash, returns: |
| 417 | * 0 - OK |
| 418 | * 1 - write timeout |
| 419 | * 2 - Flash not erased |
| 420 | */ |
| 421 | static int write_data (flash_info_t *info, ulong dest, FPW data) |
| 422 | { |
| 423 | FPWV *addr = (FPWV *) dest; |
| 424 | ulong status; |
| 425 | int cflag, iflag; |
Wolfgang Denk | 0e4018d | 2005-09-26 01:14:38 +0200 | [diff] [blame] | 426 | |
| 427 | /* Check if Flash is (sufficiently) erased */ |
| 428 | if ((*addr & data) != data) { |
| 429 | printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr); |
| 430 | return (2); |
| 431 | } |
| 432 | /* |
| 433 | * Disable interrupts which might cause a timeout |
| 434 | * here. Remember that our exception vectors are |
| 435 | * at address 0 in the flash, and we don't want a |
| 436 | * (ticker) exception to happen while the flash |
| 437 | * chip is in programming mode. |
| 438 | */ |
| 439 | cflag = icache_status (); |
| 440 | icache_disable (); |
Wolfgang Denk | 0e4018d | 2005-09-26 01:14:38 +0200 | [diff] [blame] | 441 | /* Disable interrupts which might cause a timeout here */ |
Wolfgang Denk | 080bdb7 | 2005-10-05 01:51:29 +0200 | [diff] [blame] | 442 | iflag = disable_interrupts (); |
Wolfgang Denk | 0e4018d | 2005-09-26 01:14:38 +0200 | [diff] [blame] | 443 | |
| 444 | *addr = (FPW) INTEL_PROG; /* write setup */ |
| 445 | *addr = data; |
| 446 | |
| 447 | /* arm simple, non interrupt dependent timer */ |
| 448 | reset_timer_masked (); |
| 449 | |
| 450 | /* wait while polling the status register */ |
| 451 | while (((status = *addr) & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) { |
| 452 | if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) { |
| 453 | *addr = (FPW) INTEL_RESET; /* restore read mode */ |
| 454 | return (1); |
| 455 | } |
| 456 | } |
| 457 | |
| 458 | *addr = (FPW) INTEL_RESET; /* restore read mode */ |
| 459 | |
| 460 | if (iflag) |
| 461 | enable_interrupts (); |
| 462 | |
| 463 | if (cflag) |
| 464 | icache_enable (); |
| 465 | |
| 466 | return (0); |
| 467 | } |
| 468 | |
| 469 | void inline spin_wheel (void) |
| 470 | { |
| 471 | static int p = 0; |
| 472 | static char w[] = "\\/-"; |
| 473 | |
| 474 | printf ("\010%c", w[p]); |
| 475 | (++p == 3) ? (p = 0) : 0; |
| 476 | } |
| 477 | |
| 478 | /*----------------------------------------------------------------------- |
| 479 | * Set/Clear sector's lock bit, returns: |
| 480 | * 0 - OK |
| 481 | * 1 - Error (timeout, voltage problems, etc.) |
| 482 | */ |
| 483 | int flash_real_protect(flash_info_t *info, long sector, int prot) |
| 484 | { |
| 485 | int i; |
| 486 | int rc = 0; |
| 487 | FPWV *addr = (FPWV *)(info->start[sector]); |
| 488 | int flag = disable_interrupts(); |
| 489 | |
| 490 | *addr = (FPW) INTEL_CLEAR; /* Clear status register */ |
| 491 | if (prot) { /* Set sector lock bit */ |
| 492 | *addr = (FPW) INTEL_LOCKBIT; /* Sector lock bit */ |
| 493 | *addr = (FPW) INTEL_PROTECT; /* set */ |
| 494 | } |
| 495 | else { /* Clear sector lock bit */ |
| 496 | *addr = (FPW) INTEL_LOCKBIT; /* All sectors lock bits */ |
| 497 | *addr = (FPW) INTEL_CONFIRM; /* clear */ |
| 498 | } |
| 499 | |
| 500 | reset_timer_masked (); |
| 501 | |
| 502 | while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) { |
| 503 | if (get_timer_masked () > CFG_FLASH_UNLOCK_TOUT) { |
| 504 | printf("Flash lock bit operation timed out\n"); |
| 505 | rc = 1; |
| 506 | break; |
| 507 | } |
| 508 | } |
| 509 | |
| 510 | if (*addr != (FPW) INTEL_OK) { |
| 511 | printf("Flash lock bit operation failed at %08X, CSR=%08X\n", |
| 512 | (uint)addr, (uint)*addr); |
| 513 | rc = 1; |
| 514 | } |
| 515 | |
| 516 | if (!rc) |
| 517 | info->protect[sector] = prot; |
| 518 | |
| 519 | /* |
| 520 | * Clear lock bit command clears all sectors lock bits, so |
| 521 | * we have to restore lock bits of protected sectors. |
| 522 | */ |
| 523 | if (!prot) |
| 524 | { |
| 525 | for (i = 0; i < info->sector_count; i++) |
| 526 | { |
| 527 | if (info->protect[i]) |
| 528 | { |
| 529 | reset_timer_masked (); |
| 530 | addr = (FPWV *) (info->start[i]); |
| 531 | *addr = (FPW) INTEL_LOCKBIT; /* Sector lock bit */ |
| 532 | *addr = (FPW) INTEL_PROTECT; /* set */ |
| 533 | while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) |
| 534 | { |
| 535 | if (get_timer_masked () > CFG_FLASH_UNLOCK_TOUT) |
| 536 | { |
| 537 | printf("Flash lock bit operation timed out\n"); |
| 538 | rc = 1; |
| 539 | break; |
| 540 | } |
| 541 | } |
| 542 | } |
| 543 | } |
| 544 | } |
| 545 | |
| 546 | if (flag) |
| 547 | enable_interrupts(); |
| 548 | |
| 549 | *addr = (FPW) INTEL_RESET; /* Reset to read array mode */ |
| 550 | |
| 551 | return rc; |
| 552 | } |