blob: 348db1e2f8c160cffc350fdcf3c600e22f4cbd09 [file] [log] [blame]
Yuantian Tang353f36d2019-04-10 16:43:34 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2019 NXP
4 */
5
6#ifndef __LS1028A_RDB_H
7#define __LS1028A_RDB_H
8
9#include "ls1028a_common.h"
10
11#define CONFIG_SYS_CLK_FREQ 100000000
Yuantian Tang353f36d2019-04-10 16:43:34 +080012#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
13
14#define CONFIG_SYS_RTC_BUS_NUM 0
15
16/* Store environment at top of flash */
Yuantian Tang353f36d2019-04-10 16:43:34 +080017
18#define CONFIG_DIMM_SLOTS_PER_CTLR 1
19
20#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
21
22#define CONFIG_QIXIS_I2C_ACCESS
Yuantian Tang353f36d2019-04-10 16:43:34 +080023
24/*
25 * QIXIS Definitions
26 */
27#define CONFIG_FSL_QIXIS
28
29#ifdef CONFIG_FSL_QIXIS
30#define QIXIS_BASE 0x7fb00000
31#define QIXIS_BASE_PHYS QIXIS_BASE
32#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
33#define QIXIS_LBMAP_SWITCH 2
34#define QIXIS_LBMAP_MASK 0xe0
35#define QIXIS_LBMAP_SHIFT 0x5
36#define QIXIS_LBMAP_DFLTBANK 0x00
37#define QIXIS_LBMAP_ALTBANK 0x00
38#define QIXIS_LBMAP_SD 0x00
39#define QIXIS_LBMAP_EMMC 0x00
Yuantian Tangc8f88302020-06-10 16:13:50 +080040#define QIXIS_LBMAP_XSPI 0x00
Yuantian Tang353f36d2019-04-10 16:43:34 +080041#define QIXIS_RCW_SRC_SD 0xf8
42#define QIXIS_RCW_SRC_EMMC 0xf9
Yuantian Tangc8f88302020-06-10 16:13:50 +080043#define QIXIS_RCW_SRC_XSPI 0xff
Yuantian Tang353f36d2019-04-10 16:43:34 +080044#define QIXIS_RST_CTL_RESET 0x31
45#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x10
46#define QIXIS_RCFG_CTL_RECONFIG_START 0x11
47#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
48#define QIXIS_RST_FORCE_MEM 0x01
49
50#define CONFIG_SYS_FPGA_CSPR_EXT (0x0)
51#define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
52 CSPR_PORT_SIZE_8 | \
53 CSPR_MSEL_GPCM | \
54 CSPR_V)
55#define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \
56 CSOR_NOR_NOR_MODE_AVD_NOR | \
57 CSOR_NOR_TRHZ_80)
58#endif
59
60/* SATA */
Yuantian Tang353f36d2019-04-10 16:43:34 +080061#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
62#define CONFIG_SYS_SCSI_MAX_LUN 1
63#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
64 CONFIG_SYS_SCSI_MAX_LUN)
65#define SCSI_VEND_ID 0x1b4b
66#define SCSI_DEV_ID 0x9170
67#define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
68#define CONFIG_SCSI_AHCI_PLAT
69#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
70
Yuantian Tanga023c3c2020-03-20 14:37:07 +080071/* Initial environment variables */
72#ifndef SPL_NO_ENV
73#undef CONFIG_EXTRA_ENV_SETTINGS
74#define CONFIG_EXTRA_ENV_SETTINGS \
75 "board=ls1028ardb\0" \
76 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
77 "ramdisk_addr=0x800000\0" \
78 "ramdisk_size=0x2000000\0" \
79 "bootm_size=0x10000000\0" \
80 "fdt_addr=0x00f00000\0" \
81 "kernel_addr=0x01000000\0" \
82 "scriptaddr=0x80000000\0" \
83 "scripthdraddr=0x80080000\0" \
84 "fdtheader_addr_r=0x80100000\0" \
85 "kernelheader_addr_r=0x80200000\0" \
86 "load_addr=0xa0000000\0" \
87 "kernel_addr_r=0x81000000\0" \
88 "fdt_addr_r=0x90000000\0" \
89 "ramdisk_addr_r=0xa0000000\0" \
90 "kernel_start=0x1000000\0" \
91 "kernelheader_start=0x600000\0" \
92 "kernel_load=0xa0000000\0" \
93 "kernel_size=0x2800000\0" \
94 "kernelheader_size=0x40000\0" \
95 "kernel_addr_sd=0x8000\0" \
96 "kernel_size_sd=0x14000\0" \
97 "kernelhdr_addr_sd=0x3000\0" \
98 "kernelhdr_size_sd=0x20\0" \
99 "console=ttyS0,115200\0" \
100 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
101 BOOTENV \
102 "boot_scripts=ls1028ardb_boot.scr\0" \
103 "boot_script_hdr=hdr_ls1028ardb_bs.out\0" \
104 "scan_dev_for_boot_part=" \
105 "part list ${devtype} ${devnum} devplist; " \
106 "env exists devplist || setenv devplist 1; " \
107 "for distro_bootpart in ${devplist}; do " \
108 "if fstype ${devtype} " \
109 "${devnum}:${distro_bootpart} " \
110 "bootfstype; then " \
111 "run scan_dev_for_boot; " \
112 "fi; " \
113 "done\0" \
Yuantian Tanga023c3c2020-03-20 14:37:07 +0800114 "boot_a_script=" \
115 "load ${devtype} ${devnum}:${distro_bootpart} " \
116 "${scriptaddr} ${prefix}${script}; " \
117 "env exists secureboot && load ${devtype} " \
118 "${devnum}:${distro_bootpart} " \
119 "${scripthdraddr} ${prefix}${boot_script_hdr} " \
120 "&& esbc_validate ${scripthdraddr};" \
121 "source ${scriptaddr}\0" \
122 "xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \
123 "sf probe 0:0 && sf read $load_addr " \
124 "$kernel_start $kernel_size ; env exists secureboot &&" \
125 "sf read $kernelheader_addr_r $kernelheader_start " \
126 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
127 " bootm $load_addr#$board\0" \
128 "xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \
129 "sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \
130 "&& hdp load $load_addr 0x2000\0" \
131 "sd_bootcmd=echo Trying load from SD ...;" \
132 "mmc dev 0;mmcinfo; mmc read $load_addr " \
133 "$kernel_addr_sd $kernel_size_sd && " \
134 "env exists secureboot && mmc read $kernelheader_addr_r " \
135 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
136 " && esbc_validate ${kernelheader_addr_r};" \
137 "bootm $load_addr#$board\0" \
138 "sd_hdploadcmd=echo Trying load HDP firmware from SD..;" \
139 "mmc dev 0;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
140 "&& hdp load $load_addr 0x2000\0" \
141 "emmc_bootcmd=echo Trying load from EMMC ..;" \
142 "mmc dev 1;mmcinfo; mmc read $load_addr " \
143 "$kernel_addr_sd $kernel_size_sd && " \
144 "env exists secureboot && mmc read $kernelheader_addr_r " \
145 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
146 " && esbc_validate ${kernelheader_addr_r};" \
147 "bootm $load_addr#$board\0" \
148 "emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;" \
149 "mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
150 "&& hdp load $load_addr 0x2000\0"
151#endif
Yuantian Tang353f36d2019-04-10 16:43:34 +0800152#endif /* __LS1028A_RDB_H */