| Angelo Durgehello | 05ffdc8 | 2019-11-15 23:54:19 +0100 | [diff] [blame] | 1 | * Freescale ColdFire DMA-FEC ethernet controller |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible: should be "fsl,mcf-dma-fec" |
| 5 | - reg: address and length of the register set for the device. |
| 6 | - rx-task: dma channel |
| 7 | - tx-task: dma channel |
| 8 | - rx-priority: dma channel |
| 9 | - tx-priority: dma channel |
| 10 | - rx-init: dma channel |
| 11 | - tx-init: dma channel |
| 12 | |
| 13 | Optional properties: |
| 14 | - mii-base: index of FEC reg area, 0 for FEC0, 1 for FEC1 |
| 15 | - max-speed: max speedm Mbits/sec |
| 16 | - phy-addr: phy address |
| 17 | - timeout-loop: integer value for driver loops time out |
| 18 | |
| 19 | |
| 20 | Example: |
| 21 | |
| 22 | fec0: ethernet@9000 { |
| 23 | compatible = "fsl,mcf-dma-fec"; |
| Wolfgang Denk | 0cf207e | 2021-09-27 17:42:39 +0200 | [diff] [blame^] | 24 | reg = <0x9000 0x800>; |
| Angelo Durgehello | 05ffdc8 | 2019-11-15 23:54:19 +0100 | [diff] [blame] | 25 | mii-base = <0>; |
| 26 | phy-addr = <0>; |
| 27 | timeout-loop = <5000>; |
| 28 | rx-task = <0>; |
| 29 | tx-task = <1>; |
| 30 | rx-piority = <6>; |
| 31 | tx-piority = <7>; |
| 32 | rx-init = <16>; |
| 33 | tx-init = <17>; |
| 34 | status = "disabled"; |
| 35 | }; |