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wdenk5b845b62002-08-21 21:57:24 +00001/*
wdenk5da627a2003-10-09 20:09:04 +00002 * (C) Copyright 2003
3 * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de
4 *
wdenk5b845b62002-08-21 21:57:24 +00005 * (C) Copyright 2002
6 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
7 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
wdenk5b845b62002-08-21 21:57:24 +00009 */
10
11/*
wdenk5b845b62002-08-21 21:57:24 +000012 * Altera FPGA support
13 */
14#include <common.h>
wdenk5da627a2003-10-09 20:09:04 +000015#include <ACEX1K.h>
eran liberty3c735e72008-03-27 00:50:49 +010016#include <stratixII.h>
wdenk5b845b62002-08-21 21:57:24 +000017
Marek Vasut0ae16cb2014-09-16 20:21:42 +020018/* Define FPGA_DEBUG to 1 to get debug printf's */
19#define FPGA_DEBUG 0
wdenk5b845b62002-08-21 21:57:24 +000020
wdenk5da627a2003-10-09 20:09:04 +000021/* Local Static Functions */
eran liberty3c735e72008-03-27 00:50:49 +010022static int altera_validate (Altera_desc * desc, const char *fn);
wdenk5da627a2003-10-09 20:09:04 +000023
wdenk5b845b62002-08-21 21:57:24 +000024/* ------------------------------------------------------------------------- */
Wolfgang Denke6a857d2011-07-30 13:33:49 +000025int altera_load(Altera_desc *desc, const void *buf, size_t bsize)
wdenk5b845b62002-08-21 21:57:24 +000026{
wdenk5da627a2003-10-09 20:09:04 +000027 int ret_val = FPGA_FAIL; /* assume a failure */
28
Marek Vasut0ae16cb2014-09-16 20:21:42 +020029 if (!altera_validate (desc, (char *)__func__)) {
30 printf("%s: Invalid device descriptor\n", __func__);
wdenk5da627a2003-10-09 20:09:04 +000031 } else {
32 switch (desc->family) {
33 case Altera_ACEX1K:
Stefan Roesef0ff4692006-08-15 14:15:51 +020034 case Altera_CYC2:
Matthias Fuchs01335022007-12-27 17:12:34 +010035#if defined(CONFIG_FPGA_ACEX1K)
Marek Vasut0ae16cb2014-09-16 20:21:42 +020036 debug_cond(FPGA_DEBUG,
37 "%s: Launching the ACEX1K Loader...\n",
38 __func__);
wdenk5da627a2003-10-09 20:09:04 +000039 ret_val = ACEX1K_load (desc, buf, bsize);
eran liberty3c735e72008-03-27 00:50:49 +010040#elif defined(CONFIG_FPGA_CYCLON2)
Marek Vasut0ae16cb2014-09-16 20:21:42 +020041 debug_cond(FPGA_DEBUG,
42 "%s: Launching the CYCLONE II Loader...\n",
43 __func__);
Stefan Roesef0ff4692006-08-15 14:15:51 +020044 ret_val = CYC2_load (desc, buf, bsize);
wdenk5da627a2003-10-09 20:09:04 +000045#else
Marek Vasut0ae16cb2014-09-16 20:21:42 +020046 printf("%s: No support for ACEX1K devices.\n",
47 __func__);
wdenk5da627a2003-10-09 20:09:04 +000048#endif
49 break;
50
eran liberty3c735e72008-03-27 00:50:49 +010051#if defined(CONFIG_FPGA_STRATIX_II)
52 case Altera_StratixII:
Marek Vasut0ae16cb2014-09-16 20:21:42 +020053 debug_cond(FPGA_DEBUG,
54 "%s: Launching the Stratix II Loader...\n",
55 __func__);
eran liberty3c735e72008-03-27 00:50:49 +010056 ret_val = StratixII_load (desc, buf, bsize);
57 break;
58#endif
wdenk5da627a2003-10-09 20:09:04 +000059 default:
Marek Vasut0ae16cb2014-09-16 20:21:42 +020060 printf("%s: Unsupported family type, %d\n",
61 __func__, desc->family);
wdenk5da627a2003-10-09 20:09:04 +000062 }
63 }
64
65 return ret_val;
wdenk5b845b62002-08-21 21:57:24 +000066}
67
Wolfgang Denke6a857d2011-07-30 13:33:49 +000068int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)
wdenk5b845b62002-08-21 21:57:24 +000069{
wdenk5da627a2003-10-09 20:09:04 +000070 int ret_val = FPGA_FAIL; /* assume a failure */
71
Marek Vasut0ae16cb2014-09-16 20:21:42 +020072 if (!altera_validate (desc, (char *)__func__)) {
73 printf("%s: Invalid device descriptor\n", __func__);
wdenk5da627a2003-10-09 20:09:04 +000074 } else {
75 switch (desc->family) {
76 case Altera_ACEX1K:
Matthias Fuchs01335022007-12-27 17:12:34 +010077#if defined(CONFIG_FPGA_ACEX)
Marek Vasut0ae16cb2014-09-16 20:21:42 +020078 debug_cond(FPGA_DEBUG,
79 "%s: Launching the ACEX1K Reader...\n",
80 __func__);
wdenk5da627a2003-10-09 20:09:04 +000081 ret_val = ACEX1K_dump (desc, buf, bsize);
82#else
Marek Vasut0ae16cb2014-09-16 20:21:42 +020083 printf("%s: No support for ACEX1K devices.\n",
84 __func__);
wdenk5da627a2003-10-09 20:09:04 +000085#endif
86 break;
87
eran liberty3c735e72008-03-27 00:50:49 +010088#if defined(CONFIG_FPGA_STRATIX_II)
89 case Altera_StratixII:
Marek Vasut0ae16cb2014-09-16 20:21:42 +020090 debug_cond(FPGA_DEBUG,
91 "%s: Launching the Stratix II Reader...\n",
92 __func__);
eran liberty3c735e72008-03-27 00:50:49 +010093 ret_val = StratixII_dump (desc, buf, bsize);
94 break;
95#endif
wdenk5da627a2003-10-09 20:09:04 +000096 default:
Marek Vasut0ae16cb2014-09-16 20:21:42 +020097 printf("%s: Unsupported family type, %d\n",
98 __func__, desc->family);
wdenk5da627a2003-10-09 20:09:04 +000099 }
100 }
101
102 return ret_val;
wdenk5b845b62002-08-21 21:57:24 +0000103}
104
105int altera_info( Altera_desc *desc )
106{
wdenk5da627a2003-10-09 20:09:04 +0000107 int ret_val = FPGA_FAIL;
108
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200109 if (altera_validate (desc, (char *)__func__)) {
110 printf("Family: \t");
wdenk5da627a2003-10-09 20:09:04 +0000111 switch (desc->family) {
112 case Altera_ACEX1K:
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200113 printf("ACEX1K\n");
wdenk5da627a2003-10-09 20:09:04 +0000114 break;
Stefan Roesef0ff4692006-08-15 14:15:51 +0200115 case Altera_CYC2:
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200116 printf("CYCLON II\n");
Stefan Roesef0ff4692006-08-15 14:15:51 +0200117 break;
eran liberty3c735e72008-03-27 00:50:49 +0100118 case Altera_StratixII:
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200119 printf("Stratix II\n");
eran liberty3c735e72008-03-27 00:50:49 +0100120 break;
121 /* Add new family types here */
wdenk5da627a2003-10-09 20:09:04 +0000122 default:
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200123 printf("Unknown family type, %d\n", desc->family);
wdenk5da627a2003-10-09 20:09:04 +0000124 }
125
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200126 printf("Interface type:\t");
wdenk5da627a2003-10-09 20:09:04 +0000127 switch (desc->iface) {
128 case passive_serial:
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200129 printf("Passive Serial (PS)\n");
wdenk5da627a2003-10-09 20:09:04 +0000130 break;
131 case passive_parallel_synchronous:
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200132 printf("Passive Parallel Synchronous (PPS)\n");
wdenk5da627a2003-10-09 20:09:04 +0000133 break;
134 case passive_parallel_asynchronous:
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200135 printf("Passive Parallel Asynchronous (PPA)\n");
wdenk5da627a2003-10-09 20:09:04 +0000136 break;
137 case passive_serial_asynchronous:
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200138 printf("Passive Serial Asynchronous (PSA)\n");
wdenk5da627a2003-10-09 20:09:04 +0000139 break;
140 case altera_jtag_mode: /* Not used */
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200141 printf("JTAG Mode\n");
wdenk5da627a2003-10-09 20:09:04 +0000142 break;
eran liberty3c735e72008-03-27 00:50:49 +0100143 case fast_passive_parallel:
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200144 printf("Fast Passive Parallel (FPP)\n");
eran liberty3c735e72008-03-27 00:50:49 +0100145 break;
146 case fast_passive_parallel_security:
147 printf
148 ("Fast Passive Parallel with Security (FPPS) \n");
149 break;
wdenk5da627a2003-10-09 20:09:04 +0000150 /* Add new interface types here */
151 default:
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200152 printf("Unsupported interface type, %d\n", desc->iface);
wdenk5da627a2003-10-09 20:09:04 +0000153 }
154
Simon Glassddc94372014-06-07 22:07:58 -0600155 printf("Device Size: \t%zd bytes\n"
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200156 "Cookie: \t0x%x (%d)\n",
157 desc->size, desc->cookie, desc->cookie);
wdenk5da627a2003-10-09 20:09:04 +0000158
159 if (desc->iface_fns) {
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200160 printf("Device Function Table @ 0x%p\n", desc->iface_fns);
wdenk5da627a2003-10-09 20:09:04 +0000161 switch (desc->family) {
162 case Altera_ACEX1K:
Stefan Roesef0ff4692006-08-15 14:15:51 +0200163 case Altera_CYC2:
Matthias Fuchs01335022007-12-27 17:12:34 +0100164#if defined(CONFIG_FPGA_ACEX1K)
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200165 ACEX1K_info(desc);
Matthias Fuchs01335022007-12-27 17:12:34 +0100166#elif defined(CONFIG_FPGA_CYCLON2)
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200167 CYC2_info(desc);
wdenk5da627a2003-10-09 20:09:04 +0000168#else
169 /* just in case */
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200170 printf("%s: No support for ACEX1K devices.\n",
171 __func__);
wdenk5da627a2003-10-09 20:09:04 +0000172#endif
173 break;
eran liberty3c735e72008-03-27 00:50:49 +0100174#if defined(CONFIG_FPGA_STRATIX_II)
175 case Altera_StratixII:
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200176 StratixII_info(desc);
eran liberty3c735e72008-03-27 00:50:49 +0100177 break;
178#endif
wdenk5da627a2003-10-09 20:09:04 +0000179 /* Add new family types here */
180 default:
181 /* we don't need a message here - we give one up above */
wdenkb77fad32005-04-07 22:36:40 +0000182 break;
wdenk5da627a2003-10-09 20:09:04 +0000183 }
184 } else {
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200185 printf("No Device Function Table.\n");
wdenk5da627a2003-10-09 20:09:04 +0000186 }
187
188 ret_val = FPGA_SUCCESS;
189 } else {
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200190 printf("%s: Invalid device descriptor\n", __func__);
wdenk5da627a2003-10-09 20:09:04 +0000191 }
192
193 return ret_val;
194}
195
wdenk5b845b62002-08-21 21:57:24 +0000196/* ------------------------------------------------------------------------- */
197
eran liberty3c735e72008-03-27 00:50:49 +0100198static int altera_validate (Altera_desc * desc, const char *fn)
wdenk5da627a2003-10-09 20:09:04 +0000199{
York Sun472d5462013-04-01 11:29:11 -0700200 int ret_val = false;
wdenk5da627a2003-10-09 20:09:04 +0000201
202 if (desc) {
203 if ((desc->family > min_altera_type) &&
204 (desc->family < max_altera_type)) {
205 if ((desc->iface > min_altera_iface_type) &&
206 (desc->iface < max_altera_iface_type)) {
207 if (desc->size) {
York Sun472d5462013-04-01 11:29:11 -0700208 ret_val = true;
wdenk5da627a2003-10-09 20:09:04 +0000209 } else {
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200210 printf("%s: NULL part size\n", fn);
wdenk5da627a2003-10-09 20:09:04 +0000211 }
212 } else {
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200213 printf("%s: Invalid Interface type, %d\n",
214 fn, desc->iface);
wdenk5da627a2003-10-09 20:09:04 +0000215 }
216 } else {
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200217 printf("%s: Invalid family type, %d\n", fn, desc->family);
wdenk5da627a2003-10-09 20:09:04 +0000218 }
219 } else {
Marek Vasut0ae16cb2014-09-16 20:21:42 +0200220 printf("%s: NULL descriptor!\n", fn);
wdenk5da627a2003-10-09 20:09:04 +0000221 }
222
223 return ret_val;
224}
wdenk5b845b62002-08-21 21:57:24 +0000225
226/* ------------------------------------------------------------------------- */