blob: a29d5843892c20dd5010ad43bd5fea4dd1f7d334 [file] [log] [blame]
wdenk2d5b5612003-10-14 19:43:55 +00001/*
Wolfgang Denkba94a1b2006-05-30 15:56:48 +02002 * (C) Copyright 2006
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
wdenk2d5b5612003-10-14 19:43:55 +00005 * (C) Copyright 2002
6 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
7 *
8 * (C) Copyright 2002
9 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10 * Marius Groeger <mgroeger@sysgo.de>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
wdenk2d5b5612003-10-14 19:43:55 +000031#include <common.h>
Wolfgang Denkba94a1b2006-05-30 15:56:48 +020032#include <command.h>
33#include <malloc.h>
Ben Warren10efa022008-08-31 20:37:00 -070034#include <netdev.h>
Wolfgang Denkba94a1b2006-05-30 15:56:48 +020035#include <asm/arch/ixp425.h>
wdenk2d5b5612003-10-14 19:43:55 +000036
Wolfgang Denkd87080b2006-03-31 18:32:53 +020037DECLARE_GLOBAL_DATA_PTR;
wdenk2d5b5612003-10-14 19:43:55 +000038
39/*
40 * Miscelaneous platform dependent initialisations
41 */
wdenk289f9322005-01-12 00:15:14 +000042int board_init (void)
wdenk2d5b5612003-10-14 19:43:55 +000043{
wdenk2d5b5612003-10-14 19:43:55 +000044 /* arch number of IXDP */
wdenk731215e2004-10-10 18:41:04 +000045 gd->bd->bi_arch_number = MACH_TYPE_IXDP425;
wdenk2d5b5612003-10-14 19:43:55 +000046
47 /* adress of boot parameters */
48 gd->bd->bi_boot_params = 0x00000100;
49
Wolfgang Denkba94a1b2006-05-30 15:56:48 +020050#ifdef CONFIG_IXDPG425
51 /* arch number of IXDP */
52 gd->bd->bi_arch_number = MACH_TYPE_IXDPG425;
53
54 /*
55 * Get realtek RTL8305 switch and SLIC out of reset
56 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020057 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SWITCH_RESET_N);
58 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SWITCH_RESET_N);
59 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SLIC_RESET_N);
60 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SLIC_RESET_N);
Wolfgang Denkba94a1b2006-05-30 15:56:48 +020061
62 /*
63 * Setup GPIO's for PCI INTA & INTB
64 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020065 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA_N);
66 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA_N);
67 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB_N);
68 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB_N);
Wolfgang Denkba94a1b2006-05-30 15:56:48 +020069
70 /*
71 * Setup GPIO's for 33MHz clock output
72 */
73 *IXP425_GPIO_GPCLKR = 0x01FF01FF;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020074 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
75 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
Wolfgang Denkba94a1b2006-05-30 15:56:48 +020076#endif
77
wdenk2d5b5612003-10-14 19:43:55 +000078 return 0;
79}
80
Wolfgang Denkba94a1b2006-05-30 15:56:48 +020081/*
82 * Check Board Identity
83 */
84int checkboard(void)
85{
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +000086 char buf[64];
87 int i = getenv_f("serial#", buf, sizeof(buf));
Wolfgang Denkba94a1b2006-05-30 15:56:48 +020088
89#ifdef CONFIG_IXDPG425
90 puts("Board: IXDPG425 - Intel Network Gateway Reference Platform");
91#else
92 puts("Board: IXDP425 - Intel Development Platform");
93#endif
94
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +000095 if (i > 0) {
Wolfgang Denkba94a1b2006-05-30 15:56:48 +020096 puts(", serial# ");
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +000097 puts(buf);
Wolfgang Denkba94a1b2006-05-30 15:56:48 +020098 }
99 putc('\n');
100
101 return (0);
102}
wdenk289f9322005-01-12 00:15:14 +0000103
104int dram_init (void)
wdenk2d5b5612003-10-14 19:43:55 +0000105{
wdenk2d5b5612003-10-14 19:43:55 +0000106 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
107 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
108
109 return (0);
110}
wdenk289f9322005-01-12 00:15:14 +0000111
Jon Loeligerc508a4c2007-07-09 18:31:28 -0500112#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
wdenka1191902005-01-09 17:12:27 +0000113extern struct pci_controller hose;
Wolfgang Denk3706ba12005-09-25 00:00:45 +0200114extern void pci_ixp_init(struct pci_controller * hose);
wdenk289f9322005-01-12 00:15:14 +0000115
wdenka1191902005-01-09 17:12:27 +0000116void pci_init_board(void)
117{
wdenk289f9322005-01-12 00:15:14 +0000118 extern void pci_ixp_init (struct pci_controller *hose);
119
wdenka1191902005-01-09 17:12:27 +0000120 pci_ixp_init(&hose);
wdenka1191902005-01-09 17:12:27 +0000121}
Wolfgang Denkba94a1b2006-05-30 15:56:48 +0200122#endif
Ben Warren10efa022008-08-31 20:37:00 -0700123
124int board_eth_init(bd_t *bis)
125{
126 return pci_eth_init(bis);
127}