Marek Vasut | bd963a5 | 2024-10-27 03:20:03 +0100 | [diff] [blame] | 1 | #include <configs/renesas_rcar2.config> |
| 2 | |
Vladimir Barinov | 3b7f0e1 | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 3 | CONFIG_ARM=y |
Marek Vasut | bd963a5 | 2024-10-27 03:20:03 +0100 | [diff] [blame] | 4 | CONFIG_ARCH_RENESAS=y |
Marek Vasut | f7aa3cd | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 5 | # CONFIG_SPL_USE_ARCH_MEMCPY is not set |
| 6 | # CONFIG_SPL_USE_ARCH_MEMSET is not set |
Simon Glass | 9846390 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 7 | CONFIG_TEXT_BASE=0x50000000 |
Marek Vasut | f7aa3cd | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 8 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 9 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
Tom Rini | 052170c | 2020-01-22 13:38:00 -0500 | [diff] [blame] | 10 | CONFIG_ENV_OFFSET=0xC0000 |
Marek Vasut | aad511a | 2024-03-25 09:17:54 +0100 | [diff] [blame] | 11 | CONFIG_DEFAULT_DEVICE_TREE="renesas/r8a7794-silk" |
Tom Rini | c5a6e9f | 2020-07-06 13:54:25 -0400 | [diff] [blame] | 12 | CONFIG_SPL_TEXT_BASE=0xe6300000 |
Marek Vasut | 69aa7ab | 2024-02-27 17:05:52 +0100 | [diff] [blame] | 13 | CONFIG_ARCH_RENESAS_BOARD_STRING="Silk" |
Marek Vasut | b606e1b | 2018-01-07 19:37:06 +0100 | [diff] [blame] | 14 | CONFIG_R8A7794=y |
Vladimir Barinov | 3b7f0e1 | 2015-01-12 19:17:07 +0300 | [diff] [blame] | 15 | CONFIG_TARGET_SILK=y |
Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 16 | CONFIG_SPL_SERIAL=y |
Tom Rini | fcb5117 | 2023-02-17 09:58:06 -0500 | [diff] [blame] | 17 | CONFIG_SPL_STACK=0xe6340000 |
Tom Rini | 358b6a2 | 2018-06-04 11:57:37 -0400 | [diff] [blame] | 18 | CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 |
| 19 | CONFIG_SPL=y |
Marek Vasut | f7aa3cd | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 20 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
Simon Glass | ea2ca7e | 2021-08-08 12:20:14 -0600 | [diff] [blame] | 21 | CONFIG_SPL_SPI=y |
Tom Rini | d46e86d | 2022-04-08 13:36:51 -0400 | [diff] [blame] | 22 | CONFIG_ENV_ADDR=0xC0000 |
Tom Rini | ca8a329 | 2022-05-16 17:20:26 -0400 | [diff] [blame] | 23 | CONFIG_SPL_MAX_SIZE=0x4000 |
Tom Rini | 9b5f9ae | 2022-05-19 15:09:22 -0400 | [diff] [blame] | 24 | CONFIG_SPL_NO_BSS_LIMIT=y |
Marek Vasut | f7aa3cd | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 25 | CONFIG_SPL_BOARD_INIT=y |
| 26 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y |
Tom Rini | f113d7d | 2022-05-26 13:13:21 -0400 | [diff] [blame] | 27 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
Marek Vasut | f7aa3cd | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 28 | CONFIG_SPL_RAM_DEVICE=y |
| 29 | CONFIG_SPL_SPI_LOAD=y |
Tom Rini | 3e5b62f | 2021-08-10 15:08:46 -0400 | [diff] [blame] | 30 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000 |
Marek Vasut | f7aa3cd | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 31 | CONFIG_SPL_YMODEM_SUPPORT=y |
Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 32 | CONFIG_CMD_SPI=y |
Marek Vasut | 44487f2 | 2018-05-31 14:41:58 +0200 | [diff] [blame] | 33 | CONFIG_CMD_MTDPARTS=y |
| 34 | CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" |
| 35 | CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)" |
Marek Vasut | decb5f6 | 2018-05-01 08:57:25 +0200 | [diff] [blame] | 36 | CONFIG_SYS_I2C_RCAR_I2C=y |
Marek Vasut | 1ddbcf4 | 2018-04-21 17:53:07 +0200 | [diff] [blame] | 37 | CONFIG_SH_MMCIF=y |
Miquel Raynal | 1de770d | 2019-10-03 19:50:04 +0200 | [diff] [blame] | 38 | CONFIG_DM_MTD=y |
Marek Vasut | 44487f2 | 2018-05-31 14:41:58 +0200 | [diff] [blame] | 39 | CONFIG_SPI_FLASH_MTD=y |
Tom Rini | 306881a | 2020-04-24 15:35:53 -0400 | [diff] [blame] | 40 | CONFIG_BITBANGMII=y |
Tom Rini | 448dfb4 | 2022-03-21 21:33:31 -0400 | [diff] [blame] | 41 | CONFIG_BITBANGMII_MULTI=y |
Alexandru Gagniuc | da3b9e7 | 2017-08-01 17:20:00 -0700 | [diff] [blame] | 42 | CONFIG_PHY_MICREL=y |
James Byrne | 77b508d | 2019-03-06 12:48:27 +0000 | [diff] [blame] | 43 | CONFIG_PHY_MICREL_KSZ8XXX=y |
Nobuhiro Iwamatsu | dcd18ea | 2017-12-01 16:08:03 +0900 | [diff] [blame] | 44 | CONFIG_SH_ETHER=y |