| wdenk | 2d1a537 | 2004-02-23 19:30:57 +0000 | [diff] [blame] | 1 | /* |
| 2 | * include/asm-armnommu/arch-netarm/netarm_eni_module.h |
| 3 | * |
| 4 | * Copyright (C) 2000 NETsilicon, Inc. |
| 5 | * Copyright (C) 2000 WireSpeed Communications Corporation |
| 6 | * |
| 7 | * This software is copyrighted by WireSpeed. LICENSEE agrees that |
| 8 | * it will not delete this copyright notice, trademarks or protective |
| 9 | * notices from any copy made by LICENSEE. |
| 10 | * |
| 11 | * This software is provided "AS-IS" and any express or implied |
| 12 | * warranties or conditions, including but not limited to any |
| 13 | * implied warranties of merchantability and fitness for a particular |
| 14 | * purpose regarding this software. In no event shall WireSpeed |
| 15 | * be liable for any indirect, consequential, or incidental damages, |
| 16 | * loss of profits or revenue, loss of use or data, or interruption |
| 17 | * of business, whether the alleged damages are labeled in contract, |
| 18 | * tort, or indemnity. |
| 19 | * |
| 20 | * This program is free software; you can redistribute it and/or modify |
| 21 | * it under the terms of the GNU General Public License as published by |
| 22 | * the Free Software Foundation; either version 2 of the License, or |
| 23 | * (at your option) any later version. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License |
| 26 | * along with this program; if not, write to the Free Software |
| 27 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 28 | * |
| 29 | * author(s) : David Smith |
| 30 | */ |
| 31 | |
| 32 | #ifndef __NETARM_ENI_MODULE_REGISTERS_H |
| 33 | #define __NETARM_ENI_MODULE_REGISTERS_H |
| 34 | |
| 35 | /* ENI unit register offsets */ |
| 36 | |
| 37 | /* #ifdef CONFIG_ARCH_NETARM */ |
| 38 | #define NETARM_ENI_MODULE_BASE (0xFFA00000) |
| 39 | /* #endif / * CONFIG_ARCH_NETARM */ |
| 40 | |
| 41 | #define get_eni_reg_addr(c) ((volatile unsigned int *)(NETARM_ENI_MODULE_BASE + (c))) |
| 42 | #define get_eni_ctl_reg_addr(minor) \ |
| 43 | (get_eni_reg_addr(NETARM_ENI_1284_PORT1_CONTROL) + (minor)) |
| 44 | |
| 45 | #define NETARM_ENI_GENERAL_CONTROL (0x00) |
| 46 | #define NETARM_ENI_STATUS_CONTROL (0x04) |
| 47 | #define NETARM_ENI_FIFO_MODE_DATA (0x08) |
| 48 | |
| 49 | #define NETARM_ENI_1284_PORT1_CONTROL (0x10) |
| 50 | #define NETARM_ENI_1284_PORT2_CONTROL (0x14) |
| 51 | #define NETARM_ENI_1284_PORT3_CONTROL (0x18) |
| 52 | #define NETARM_ENI_1284_PORT4_CONTROL (0x1c) |
| 53 | |
| 54 | #define NETARM_ENI_1284_CHANNEL1_DATA (0x20) |
| 55 | #define NETARM_ENI_1284_CHANNEL2_DATA (0x24) |
| 56 | #define NETARM_ENI_1284_CHANNEL3_DATA (0x28) |
| 57 | #define NETARM_ENI_1284_CHANNEL4_DATA (0x2c) |
| 58 | |
| 59 | #define NETARM_ENI_ENI_CONTROL (0x30) |
| 60 | #define NETARM_ENI_ENI_PULSED_INTR (0x34) |
| 61 | #define NETARM_ENI_ENI_SHARED_RAM_ADDR (0x38) |
| 62 | #define NETARM_ENI_ENI_SHARED (0x3c) |
| 63 | |
| 64 | /* select bitfield defintions */ |
| 65 | |
| 66 | /* General Control Register (0xFFA0_0000) */ |
| 67 | |
| 68 | #define NETARM_ENI_GCR_ENIMODE_IEEE1284 (0x00000001) |
| 69 | #define NETARM_ENI_GCR_ENIMODE_SHRAM16 (0x00000004) |
| 70 | #define NETARM_ENI_GCR_ENIMODE_SHRAM8 (0x00000005) |
| 71 | #define NETARM_ENI_GCR_ENIMODE_FIFO16 (0x00000006) |
| 72 | #define NETARM_ENI_GCR_ENIMODE_FIFO8 (0x00000007) |
| 73 | |
| 74 | #define NETARM_ENI_GCR_ENIMODE_MASK (0x00000007) |
| 75 | |
| 76 | /* IEEE 1284 Port Control Registers 1-4 (0xFFA0_0010, 0xFFA0_0014, |
| 77 | 0xFFA0_0018, 0xFFA0_001c) */ |
| 78 | |
| 79 | #define NETARM_ENI_1284PC_PORT_ENABLE (0x80000000) |
| 80 | #define NETARM_ENI_1284PC_DMA_ENABLE (0x40000000) |
| 81 | #define NETARM_ENI_1284PC_OBE_INT_EN (0x20000000) |
| 82 | #define NETARM_ENI_1284PC_ACK_INT_EN (0x10000000) |
| 83 | #define NETARM_ENI_1284PC_ECP_MODE (0x08000000) |
| 84 | #define NETARM_ENI_1284PC_LOOPBACK_MODE (0x04000000) |
| 85 | |
| 86 | #define NETARM_ENI_1284PC_STROBE_TIME0 (0x00000000) /* 0.5 uS */ |
| 87 | #define NETARM_ENI_1284PC_STROBE_TIME1 (0x01000000) /* 1.0 uS */ |
| 88 | #define NETARM_ENI_1284PC_STROBE_TIME2 (0x02000000) /* 5.0 uS */ |
| 89 | #define NETARM_ENI_1284PC_STROBE_TIME3 (0x03000000) /* 10.0 uS */ |
| 90 | #define NETARM_ENI_1284PC_STROBE_MASK (0x03000000) |
| 91 | |
| 92 | #define NETARM_ENI_1284PC_MAN_STROBE_EN (0x00800000) |
| 93 | #define NETARM_ENI_1284PC_FAST_MODE (0x00400000) |
| 94 | #define NETARM_ENI_1284PC_BIDIR_MODE (0x00200000) |
| 95 | |
| 96 | #define NETARM_ENI_1284PC_MAN_STROBE (0x00080000) |
| 97 | #define NETARM_ENI_1284PC_AUTO_FEED (0x00040000) |
| 98 | #define NETARM_ENI_1284PC_INIT (0x00020000) |
| 99 | #define NETARM_ENI_1284PC_HSELECT (0x00010000) |
| 100 | #define NETARM_ENI_1284PC_FE_INT_EN (0x00008000) |
| 101 | #define NETARM_ENI_1284PC_EPP_MODE (0x00004000) |
| 102 | #define NETARM_ENI_1284PC_IBR_INT_EN (0x00002000) |
| 103 | #define NETARM_ENI_1284PC_IBR (0x00001000) |
| 104 | |
| 105 | #define NETARM_ENI_1284PC_RXFDB_1BYTE (0x00000400) |
| 106 | #define NETARM_ENI_1284PC_RXFDB_2BYTE (0x00000800) |
| 107 | #define NETARM_ENI_1284PC_RXFDB_3BYTE (0x00000c00) |
| 108 | #define NETARM_ENI_1284PC_RXFDB_4BYTE (0x00000000) |
| 109 | |
| 110 | #define NETARM_ENI_1284PC_RBCC (0x00000200) |
| 111 | #define NETARM_ENI_1284PC_RBCT (0x00000100) |
| 112 | #define NETARM_ENI_1284PC_ACK (0x00000080) |
| 113 | #define NETARM_ENI_1284PC_FIFO_E (0x00000040) |
| 114 | #define NETARM_ENI_1284PC_OBE (0x00000020) |
| 115 | #define NETARM_ENI_1284PC_ACK_INT (0x00000010) |
| 116 | #define NETARM_ENI_1284PC_BUSY (0x00000008) |
| 117 | #define NETARM_ENI_1284PC_PE (0x00000004) |
| 118 | #define NETARM_ENI_1284PC_PSELECT (0x00000002) |
| 119 | #define NETARM_ENI_1284PC_FAULT (0x00000001) |
| 120 | |
| 121 | #endif /* __NETARM_ENI_MODULE_REGISTERS_H */ |