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wdenkf780aa22002-09-18 19:21:21 +00001/*
2 * (C) Copyright 2000-2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2002 (440 port)
6 * Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com
7 *
wdenkba56f622004-02-06 23:19:44 +00008 * (C) Copyright 2003 (440GX port)
9 * Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
10 *
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +020011 * (C) Copyright 2008 (PPC440X05 port for Virtex 5 FX)
12 * Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
13 * Work supported by Qtechnology (htpp://qtec.com)
14 *
wdenkf780aa22002-09-18 19:21:21 +000015 * See file CREDITS for list of people who contributed to this
16 * project.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 */
33
34#include <common.h>
35#include <watchdog.h>
36#include <command.h>
wdenkf780aa22002-09-18 19:21:21 +000037#include <asm/processor.h>
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +020038#include <asm/interrupt.h>
wdenkf780aa22002-09-18 19:21:21 +000039#include <ppc4xx.h>
40#include <ppc_asm.tmpl>
41#include <commproc.h>
wdenkf780aa22002-09-18 19:21:21 +000042
Stefan Roesed1631fe2008-06-26 13:40:57 +020043DECLARE_GLOBAL_DATA_PTR;
wdenkf780aa22002-09-18 19:21:21 +000044
wdenkf780aa22002-09-18 19:21:21 +000045/*
46 * CPM interrupt vector functions.
47 */
48struct irq_action {
49 interrupt_handler_t *handler;
50 void *arg;
51 int count;
52};
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +020053static struct irq_action irq_vecs[IRQ_MAX];
wdenkf780aa22002-09-18 19:21:21 +000054
wdenkf780aa22002-09-18 19:21:21 +000055#if defined(CONFIG_440)
56
57/* SPRN changed in 440 */
58static __inline__ void set_evpr(unsigned long val)
59{
60 asm volatile("mtspr 0x03f,%0" : : "r" (val));
61}
62
63#else /* !defined(CONFIG_440) */
64
wdenkf780aa22002-09-18 19:21:21 +000065static __inline__ void set_pit(unsigned long val)
66{
67 asm volatile("mtpit %0" : : "r" (val));
68}
69
70
71static __inline__ void set_tcr(unsigned long val)
72{
73 asm volatile("mttcr %0" : : "r" (val));
74}
75
76
77static __inline__ void set_evpr(unsigned long val)
78{
79 asm volatile("mtevpr %0" : : "r" (val));
80}
81#endif /* defined(CONFIG_440 */
82
wdenka8c7c702003-12-06 19:49:23 +000083int interrupt_init_cpu (unsigned *decrementer_count)
wdenkf780aa22002-09-18 19:21:21 +000084{
wdenkf780aa22002-09-18 19:21:21 +000085 int vec;
86 unsigned long val;
87
wdenka8c7c702003-12-06 19:49:23 +000088 /* decrementer is automatically reloaded */
89 *decrementer_count = 0;
wdenkd4ca31c2004-01-02 14:00:00 +000090
wdenkf780aa22002-09-18 19:21:21 +000091 /*
92 * Mark all irqs as free
93 */
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +020094 for (vec = 0; vec < IRQ_MAX; vec++) {
wdenkf780aa22002-09-18 19:21:21 +000095 irq_vecs[vec].handler = NULL;
96 irq_vecs[vec].arg = NULL;
97 irq_vecs[vec].count = 0;
wdenkf780aa22002-09-18 19:21:21 +000098 }
99
100#ifdef CONFIG_4xx
101 /*
102 * Init PIT
103 */
104#if defined(CONFIG_440)
Matthias Fuchs58ea1422009-07-22 17:27:56 +0200105 val = mfspr( SPRN_TCR );
wdenkf780aa22002-09-18 19:21:21 +0000106 val &= (~0x04400000); /* clear DIS & ARE */
Matthias Fuchs58ea1422009-07-22 17:27:56 +0200107 mtspr( SPRN_TCR, val );
108 mtspr( SPRN_DEC, 0 ); /* Prevent exception after TSR clear*/
109 mtspr( SPRN_DECAR, 0 ); /* clear reload */
110 mtspr( SPRN_TSR, 0x08000000 ); /* clear DEC status */
stroese68e02362005-04-07 05:32:44 +0000111 val = gd->bd->bi_intfreq/1000; /* 1 msec */
Matthias Fuchs58ea1422009-07-22 17:27:56 +0200112 mtspr( SPRN_DECAR, val ); /* Set auto-reload value */
113 mtspr( SPRN_DEC, val ); /* Set inital val */
wdenkf780aa22002-09-18 19:21:21 +0000114#else
115 set_pit(gd->bd->bi_intfreq / 1000);
116#endif
117#endif /* CONFIG_4xx */
118
119#ifdef CONFIG_ADCIOP
120 /*
121 * Init PIT
122 */
123 set_pit(66000);
124#endif
125
126 /*
127 * Enable PIT
128 */
Matthias Fuchs58ea1422009-07-22 17:27:56 +0200129 val = mfspr(SPRN_TCR);
wdenkf780aa22002-09-18 19:21:21 +0000130 val |= 0x04400000;
Matthias Fuchs58ea1422009-07-22 17:27:56 +0200131 mtspr(SPRN_TCR, val);
wdenkf780aa22002-09-18 19:21:21 +0000132
133 /*
134 * Set EVPR to 0
135 */
136 set_evpr(0x00000000);
137
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +0200138 /*
Stefan Roese60204d02008-07-18 12:24:41 +0200139 * Call uic or xilinx_irq pic_enable
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +0200140 */
141 pic_enable();
wdenkf780aa22002-09-18 19:21:21 +0000142
143 return (0);
144}
145
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +0200146void timer_interrupt_cpu(struct pt_regs *regs)
Stefan Roese56e41012008-02-19 22:07:57 +0100147{
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +0200148 /* nothing to do here */
Stefan Roese56e41012008-02-19 22:07:57 +0100149 return;
wdenkba56f622004-02-06 23:19:44 +0000150}
151
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +0200152void interrupt_run_handler(int vec)
153{
154 irq_vecs[vec].count++;
155
156 if (irq_vecs[vec].handler != NULL) {
157 /* call isr */
158 (*irq_vecs[vec].handler) (irq_vecs[vec].arg);
159 } else {
160 pic_irq_disable(vec);
161 printf("Masking bogus interrupt vector %d\n", vec);
162 }
163
164 pic_irq_ack(vec);
165 return;
166}
167
Stefan Roese56e41012008-02-19 22:07:57 +0100168void irq_install_handler(int vec, interrupt_handler_t * handler, void *arg)
wdenkf780aa22002-09-18 19:21:21 +0000169{
Stefan Roesec157d8e2005-08-01 16:41:48 +0200170 /*
Stefan Roese56e41012008-02-19 22:07:57 +0100171 * Print warning when replacing with a different irq vector
Stefan Roesec157d8e2005-08-01 16:41:48 +0200172 */
Stefan Roese56e41012008-02-19 22:07:57 +0100173 if ((irq_vecs[vec].handler != NULL) && (irq_vecs[vec].handler != handler)) {
174 printf("Interrupt vector %d: handler 0x%x replacing 0x%x\n",
175 vec, (uint) handler, (uint) irq_vecs[vec].handler);
wdenkf780aa22002-09-18 19:21:21 +0000176 }
Stefan Roese56e41012008-02-19 22:07:57 +0100177 irq_vecs[vec].handler = handler;
178 irq_vecs[vec].arg = arg;
wdenkf780aa22002-09-18 19:21:21 +0000179
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +0200180 pic_irq_enable(vec);
181 return;
wdenkf780aa22002-09-18 19:21:21 +0000182}
183
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +0200184void irq_free_handler(int vec)
wdenkf780aa22002-09-18 19:21:21 +0000185{
Stefan Roese56e41012008-02-19 22:07:57 +0100186 debug("Free interrupt for vector %d ==> %p\n",
187 vec, irq_vecs[vec].handler);
188
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +0200189 pic_irq_disable(vec);
wdenkf780aa22002-09-18 19:21:21 +0000190
Stefan Roese56e41012008-02-19 22:07:57 +0100191 irq_vecs[vec].handler = NULL;
192 irq_vecs[vec].arg = NULL;
wdenka8c7c702003-12-06 19:49:23 +0000193 return;
wdenkf780aa22002-09-18 19:21:21 +0000194}
195
Jon Loeliger3a1ed1e2007-07-09 18:57:22 -0500196#if defined(CONFIG_CMD_IRQ)
Stefan Roese56e41012008-02-19 22:07:57 +0100197int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
wdenkf780aa22002-09-18 19:21:21 +0000198{
199 int vec;
200
Stefan Roese56e41012008-02-19 22:07:57 +0100201 printf ("Interrupt-Information:\n");
wdenkf780aa22002-09-18 19:21:21 +0000202 printf ("Nr Routine Arg Count\n");
203
Ricardo Ribalda Delgadod865fd02008-07-17 11:44:12 +0200204 for (vec = 0; vec < IRQ_MAX; vec++) {
wdenkf780aa22002-09-18 19:21:21 +0000205 if (irq_vecs[vec].handler != NULL) {
206 printf ("%02d %08lx %08lx %d\n",
207 vec,
208 (ulong)irq_vecs[vec].handler,
209 (ulong)irq_vecs[vec].arg,
210 irq_vecs[vec].count);
211 }
212 }
213
wdenkf780aa22002-09-18 19:21:21 +0000214 return 0;
215}
Jon Loeliger3a1ed1e2007-07-09 18:57:22 -0500216#endif