Vladimir Zapolskiy | cc35fdb | 2012-04-19 04:33:09 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2011 Vladimir Zapolskiy <vz@mleia.com> |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License |
| 6 | * as published by the Free Software Foundation; either version 2 |
| 7 | * of the License, or (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
| 17 | * MA 02110-1301, USA. |
| 18 | */ |
| 19 | |
| 20 | #include <common.h> |
| 21 | #include <asm/arch/cpu.h> |
| 22 | #include <asm/arch/clk.h> |
| 23 | #include <asm/arch/uart.h> |
| 24 | #include <asm/io.h> |
| 25 | |
| 26 | DECLARE_GLOBAL_DATA_PTR; |
| 27 | |
| 28 | static struct hsuart_regs *hsuart = (struct hsuart_regs *)HS_UART_BASE; |
| 29 | |
| 30 | static void lpc32xx_hsuart_set_baudrate(void) |
| 31 | { |
| 32 | u32 div; |
| 33 | |
| 34 | /* UART rate = PERIPH_CLK / ((HSU_RATE + 1) x 14) */ |
| 35 | div = (get_serial_clock() / 14 + gd->baudrate / 2) / gd->baudrate - 1; |
| 36 | if (div > 255) |
| 37 | div = 255; |
| 38 | |
| 39 | writel(div, &hsuart->rate); |
| 40 | } |
| 41 | |
| 42 | static int lpc32xx_hsuart_getc(void) |
| 43 | { |
| 44 | while (!(readl(&hsuart->level) & HSUART_LEVEL_RX)) |
| 45 | /* NOP */; |
| 46 | |
| 47 | return readl(&hsuart->rx) & HSUART_RX_DATA; |
| 48 | } |
| 49 | |
| 50 | static void lpc32xx_hsuart_putc(const char c) |
| 51 | { |
| 52 | writel(c, &hsuart->tx); |
| 53 | |
| 54 | /* Wait for character to be sent */ |
| 55 | while (readl(&hsuart->level) & HSUART_LEVEL_TX) |
| 56 | /* NOP */; |
| 57 | } |
| 58 | |
| 59 | static int lpc32xx_hsuart_tstc(void) |
| 60 | { |
| 61 | if (readl(&hsuart->level) & HSUART_LEVEL_RX) |
| 62 | return 1; |
| 63 | |
| 64 | return 0; |
| 65 | } |
| 66 | |
| 67 | static void lpc32xx_hsuart_init(void) |
| 68 | { |
| 69 | lpc32xx_hsuart_set_baudrate(); |
| 70 | |
| 71 | /* Disable hardware RTS and CTS flow control, set up RX and TX FIFO */ |
| 72 | writel(HSUART_CTRL_TMO_16 | HSUART_CTRL_HSU_OFFSET(20) | |
| 73 | HSUART_CTRL_HSU_RX_TRIG_32 | HSUART_CTRL_HSU_TX_TRIG_0, |
| 74 | &hsuart->ctrl); |
| 75 | } |
| 76 | |
| 77 | void serial_setbrg(void) |
| 78 | { |
| 79 | return lpc32xx_hsuart_set_baudrate(); |
| 80 | } |
| 81 | |
| 82 | void serial_putc(const char c) |
| 83 | { |
| 84 | lpc32xx_hsuart_putc(c); |
| 85 | |
| 86 | /* If \n, also do \r */ |
| 87 | if (c == '\n') |
| 88 | lpc32xx_hsuart_putc('\r'); |
| 89 | } |
| 90 | |
| 91 | int serial_getc(void) |
| 92 | { |
| 93 | return lpc32xx_hsuart_getc(); |
| 94 | } |
| 95 | |
| 96 | void serial_puts(const char *s) |
| 97 | { |
| 98 | while (*s) |
| 99 | serial_putc(*s++); |
| 100 | } |
| 101 | |
| 102 | int serial_tstc(void) |
| 103 | { |
| 104 | return lpc32xx_hsuart_tstc(); |
| 105 | } |
| 106 | |
| 107 | int serial_init(void) |
| 108 | { |
| 109 | lpc32xx_hsuart_init(); |
| 110 | |
| 111 | return 0; |
| 112 | } |