Simon Glass | 3eafce0 | 2014-11-12 22:42:27 -0700 | [diff] [blame] | 1 | /* |
| 2 | * From Coreboot file of same name |
| 3 | * |
| 4 | * Copyright (C) 2014 Google, Inc |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0 |
| 7 | */ |
| 8 | |
| 9 | #ifndef _ARCH_ASM_LAPIC_H |
| 10 | #define _ARCH_ASM_LAPIC_H |
| 11 | |
| 12 | #include <asm/io.h> |
| 13 | #include <asm/lapic_def.h> |
| 14 | #include <asm/msr.h> |
| 15 | #include <asm/processor.h> |
| 16 | |
| 17 | static inline __attribute__((always_inline)) |
| 18 | unsigned long lapic_read(unsigned long reg) |
| 19 | { |
| 20 | return readl(LAPIC_DEFAULT_BASE + reg); |
| 21 | } |
| 22 | |
| 23 | static inline __attribute__((always_inline)) |
| 24 | void lapic_write(unsigned long reg, unsigned long val) |
| 25 | { |
| 26 | writel(val, LAPIC_DEFAULT_BASE + reg); |
| 27 | } |
| 28 | |
| 29 | static inline __attribute__((always_inline)) void lapic_wait_icr_idle(void) |
| 30 | { |
| 31 | do { } while (lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY); |
| 32 | } |
| 33 | |
| 34 | static inline void enable_lapic(void) |
| 35 | { |
| 36 | msr_t msr; |
| 37 | |
| 38 | msr = msr_read(LAPIC_BASE_MSR); |
| 39 | msr.hi &= 0xffffff00; |
| 40 | msr.lo &= 0x000007ff; |
| 41 | msr.lo |= LAPIC_DEFAULT_BASE | (1 << 11); |
| 42 | msr_write(LAPIC_BASE_MSR, msr); |
| 43 | } |
| 44 | |
| 45 | static inline void disable_lapic(void) |
| 46 | { |
| 47 | msr_t msr; |
| 48 | |
| 49 | msr = msr_read(LAPIC_BASE_MSR); |
| 50 | msr.lo &= ~(1 << 11); |
| 51 | msr_write(LAPIC_BASE_MSR, msr); |
| 52 | } |
| 53 | |
| 54 | static inline __attribute__((always_inline)) unsigned long lapicid(void) |
| 55 | { |
| 56 | return lapic_read(LAPIC_ID) >> 24; |
| 57 | } |
| 58 | |
| 59 | #endif |