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Marek Vasutf91c09a2014-10-24 23:39:07 +02001/*
2 * Novena board support
3 *
4 * Copyright (C) 2014 Marek Vasut <marex@denx.de>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#include <common.h>
10#include <asm/errno.h>
11#include <asm/gpio.h>
12#include <asm/io.h>
13#include <asm/arch/clock.h>
14#include <asm/arch/crm_regs.h>
15#include <asm/arch/imx-regs.h>
16#include <asm/arch/iomux.h>
17#include <asm/arch/mxc_hdmi.h>
18#include <asm/arch/sys_proto.h>
19#include <asm/imx-common/boot_mode.h>
20#include <asm/imx-common/iomux-v3.h>
21#include <asm/imx-common/mxc_i2c.h>
22#include <asm/imx-common/sata.h>
23#include <asm/imx-common/video.h>
24#include <fsl_esdhc.h>
25#include <i2c.h>
26#include <input.h>
27#include <ipu_pixfmt.h>
28#include <linux/fb.h>
29#include <linux/input.h>
30#include <malloc.h>
31#include <micrel.h>
32#include <miiphy.h>
33#include <mmc.h>
34#include <netdev.h>
35#include <power/pmic.h>
36#include <power/pfuze100_pmic.h>
37#include <stdio_dev.h>
38
39DECLARE_GLOBAL_DATA_PTR;
40
41#define NOVENA_BUTTON_GPIO IMX_GPIO_NR(4, 14)
42#define NOVENA_SD_WP IMX_GPIO_NR(1, 2)
43#define NOVENA_SD_CD IMX_GPIO_NR(1, 4)
44
45/*
46 * GPIO button
47 */
48#ifdef CONFIG_KEYBOARD
49static struct input_config button_input;
50
51static int novena_gpio_button_read_keys(struct input_config *input)
52{
53 int key = KEY_ENTER;
54 if (gpio_get_value(NOVENA_BUTTON_GPIO))
55 return 0;
56 input_send_keycodes(&button_input, &key, 1);
57 return 1;
58}
59
60static int novena_gpio_button_getc(struct stdio_dev *dev)
61{
62 return input_getc(&button_input);
63}
64
65static int novena_gpio_button_tstc(struct stdio_dev *dev)
66{
67 return input_tstc(&button_input);
68}
69
70static int novena_gpio_button_init(struct stdio_dev *dev)
71{
72 gpio_direction_input(NOVENA_BUTTON_GPIO);
73 input_set_delays(&button_input, 250, 250);
74 return 0;
75}
76
77int drv_keyboard_init(void)
78{
79 int error;
80 struct stdio_dev dev = {
81 .name = "button",
82 .flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM,
83 .start = novena_gpio_button_init,
84 .getc = novena_gpio_button_getc,
85 .tstc = novena_gpio_button_tstc,
86 };
87
88 error = input_init(&button_input, 0);
89 if (error) {
90 debug("%s: Cannot set up input\n", __func__);
91 return -1;
92 }
93 button_input.read_keys = novena_gpio_button_read_keys;
94
95 error = input_stdio_register(&dev);
96 if (error)
97 return error;
98
99 return 0;
100}
101#endif
102
103/*
104 * SDHC
105 */
106#ifdef CONFIG_FSL_ESDHC
107static struct fsl_esdhc_cfg usdhc_cfg[] = {
108 { USDHC3_BASE_ADDR, 0, 4 }, /* Micro SD */
109 { USDHC2_BASE_ADDR, 0, 4 }, /* Big SD */
110};
111
112int board_mmc_getcd(struct mmc *mmc)
113{
114 struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
115
116 /* There is no CD for a microSD card, assume always present. */
117 if (cfg->esdhc_base == USDHC3_BASE_ADDR)
118 return 1;
119 else
120 return !gpio_get_value(NOVENA_SD_CD);
121}
122
123int board_mmc_getwp(struct mmc *mmc)
124{
125 struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
126
127 /* There is no WP for a microSD card, assume always read-write. */
128 if (cfg->esdhc_base == USDHC3_BASE_ADDR)
129 return 0;
130 else
131 return gpio_get_value(NOVENA_SD_WP);
132}
133
134
135int board_mmc_init(bd_t *bis)
136{
137 s32 status = 0;
138 int index;
139
140 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
141 usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
142
143 /* Big SD write-protect and card-detect */
144 gpio_direction_input(NOVENA_SD_WP);
145 gpio_direction_input(NOVENA_SD_CD);
146
147 for (index = 0; index < ARRAY_SIZE(usdhc_cfg); index++) {
148 status = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
149 if (status)
150 return status;
151 }
152
153 return status;
154}
155#endif
156
157/*
158 * Video over HDMI
159 */
160#if defined(CONFIG_VIDEO_IPUV3)
161static void enable_hdmi(struct display_info_t const *dev)
162{
163 imx_enable_hdmi_phy();
164}
165
166struct display_info_t const displays[] = {
167 {
168 /* HDMI Output */
169 .bus = -1,
170 .addr = 0,
171 .pixfmt = IPU_PIX_FMT_RGB24,
172 .detect = detect_hdmi,
173 .enable = enable_hdmi,
174 .mode = {
175 .name = "HDMI",
176 .refresh = 60,
177 .xres = 1024,
178 .yres = 768,
179 .pixclock = 15385,
180 .left_margin = 220,
181 .right_margin = 40,
182 .upper_margin = 21,
183 .lower_margin = 7,
184 .hsync_len = 60,
185 .vsync_len = 10,
186 .sync = FB_SYNC_EXT,
187 .vmode = FB_VMODE_NONINTERLACED
188 }
189 }
190};
191
192size_t display_count = ARRAY_SIZE(displays);
193
194static void setup_display(void)
195{
196 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
197 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
198
199 enable_ipu_clock();
200 imx_setup_hdmi();
201
202 /* Turn on LDB0,IPU,IPU DI0 clocks */
203 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK);
204
205 /* set LDB0, LDB1 clk select to 011/011 */
206 clrsetbits_le32(&mxc_ccm->cs2cdr,
207 MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK |
208 MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK,
209 (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) |
210 (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET));
211
212 setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV);
213
214 setbits_le32(&mxc_ccm->chsccdr, CHSCCDR_CLK_SEL_LDB_DI0 <<
215 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
216
217 writel(IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES |
218 IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH |
219 IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW |
220 IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG |
221 IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT |
222 IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG |
223 IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT |
224 IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED |
225 IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0,
226 &iomux->gpr[2]);
227
228 clrsetbits_le32(&iomux->gpr[3], IOMUXC_GPR3_LVDS0_MUX_CTL_MASK,
229 IOMUXC_GPR3_MUX_SRC_IPU1_DI0 <<
230 IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
231}
232#endif
233
234int board_early_init_f(void)
235{
236#if defined(CONFIG_VIDEO_IPUV3)
237 setup_display();
238#endif
239
Marek Vasutf91c09a2014-10-24 23:39:07 +0200240 return 0;
241}
242
243int board_init(void)
244{
245 /* address of boot parameters */
246 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
247
248#ifdef CONFIG_CMD_SATA
249 setup_sata();
250#endif
251
252 return 0;
253}
254
255int checkboard(void)
256{
257 puts("Board: Novena 4x\n");
258 return 0;
259}
260
261int dram_init(void)
262{
263 gd->ram_size = imx_ddr_size();
264 return 0;
265}
266
267/* setup board specific PMIC */
268int power_init_board(void)
269{
270 struct pmic *p;
271 u32 reg;
272 int ret;
273
274 power_pfuze100_init(1);
275 p = pmic_get("PFUZE100");
276 if (!p)
277 return -EINVAL;
278
279 ret = pmic_probe(p);
280 if (ret)
281 return ret;
282
283 pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
284 printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
285
286 /* Set SWBST to 5.0V and enable (for USB) */
287 pmic_reg_read(p, PFUZE100_SWBSTCON1, &reg);
288 reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK);
289 reg |= (SWBST_5_00V | SWBST_MODE_AUTO);
290 pmic_reg_write(p, PFUZE100_SWBSTCON1, reg);
291
292 return 0;
293}
294
295/* EEPROM configuration data */
296struct novena_eeprom_data {
297 uint8_t signature[6];
298 uint8_t version;
299 uint8_t reserved;
300 uint32_t serial;
301 uint8_t mac[6];
302 uint16_t features;
303};
304
305int misc_init_r(void)
306{
307 struct novena_eeprom_data data;
308 uchar *datap = (uchar *)&data;
309 const char *signature = "Novena";
310 int ret;
311
312 /* If 'ethaddr' is already set, do nothing. */
313 if (getenv("ethaddr"))
314 return 0;
315
316 /* EEPROM is at bus 2. */
317 ret = i2c_set_bus_num(2);
318 if (ret) {
319 puts("Cannot select EEPROM I2C bus.\n");
320 return 0;
321 }
322
323 /* EEPROM is at address 0x56. */
324 ret = eeprom_read(0x56, 0, datap, sizeof(data));
325 if (ret) {
326 puts("Cannot read I2C EEPROM.\n");
327 return 0;
328 }
329
330 /* Check EEPROM signature. */
331 if (memcmp(data.signature, signature, 6)) {
332 puts("Invalid I2C EEPROM signature.\n");
333 return 0;
334 }
335
336 /* Set ethernet address from EEPROM. */
337 eth_setenv_enetaddr("ethaddr", data.mac);
338
339 return ret;
340}