Graeme Russ | 5b34a29 | 2009-08-23 12:59:58 +1000 | [diff] [blame] | 1 | /* |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 2 | * (C) Copyright 2008,2009 |
| 3 | * Graeme Russ, <graeme.russ@gmail.com> |
Graeme Russ | 5b34a29 | 2009-08-23 12:59:58 +1000 | [diff] [blame] | 4 | * |
| 5 | * (C) Copyright 2002 |
Albert ARIBAUD | fa82f87 | 2011-08-04 18:45:45 +0200 | [diff] [blame] | 6 | * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> |
Graeme Russ | 5b34a29 | 2009-08-23 12:59:58 +1000 | [diff] [blame] | 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 26 | |
Graeme Russ | 5b34a29 | 2009-08-23 12:59:58 +1000 | [diff] [blame] | 27 | #include <common.h> |
| 28 | #include <pci.h> |
| 29 | #include <asm/pci.h> |
Graeme Russ | 3c7db1b | 2011-08-04 22:05:09 +1000 | [diff] [blame] | 30 | #include <asm/arch/pci.h> |
Graeme Russ | 5b34a29 | 2009-08-23 12:59:58 +1000 | [diff] [blame] | 31 | |
| 32 | static void pci_enet_fixup_irq(struct pci_controller *hose, pci_dev_t dev) |
| 33 | { |
| 34 | /* a configurable lists of IRQs to steal when we need one */ |
| 35 | static int irq_list[] = { |
| 36 | CONFIG_SYS_FIRST_PCI_IRQ, |
| 37 | CONFIG_SYS_SECOND_PCI_IRQ, |
| 38 | CONFIG_SYS_THIRD_PCI_IRQ, |
| 39 | CONFIG_SYS_FORTH_PCI_IRQ |
| 40 | }; |
| 41 | static int next_irq_index=0; |
| 42 | |
| 43 | uchar tmp_pin; |
| 44 | int pin; |
| 45 | |
| 46 | pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin); |
| 47 | pin = tmp_pin; |
| 48 | |
| 49 | pin -= 1; /* PCI config space use 1-based numbering */ |
| 50 | if (pin == -1) { |
| 51 | return; /* device use no irq */ |
| 52 | } |
| 53 | |
| 54 | /* map device number + pin to a pin on the sc520 */ |
| 55 | switch (PCI_DEV(dev)) { |
| 56 | case 12: /* First Ethernet Chip */ |
| 57 | pin += SC520_PCI_INTA; |
| 58 | break; |
| 59 | |
| 60 | case 13: /* Second Ethernet Chip */ |
| 61 | pin += SC520_PCI_INTB; |
| 62 | break; |
| 63 | |
| 64 | default: |
| 65 | return; |
| 66 | } |
| 67 | |
| 68 | pin &= 3; /* wrap around */ |
| 69 | |
| 70 | if (sc520_pci_ints[pin] == -1) { |
| 71 | /* re-route one interrupt for us */ |
| 72 | if (next_irq_index > 3) { |
| 73 | return; |
| 74 | } |
| 75 | if (pci_sc520_set_irq(pin, irq_list[next_irq_index])) { |
| 76 | return; |
| 77 | } |
| 78 | next_irq_index++; |
| 79 | } |
| 80 | |
| 81 | if (-1 != sc520_pci_ints[pin]) { |
| 82 | pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, |
| 83 | sc520_pci_ints[pin]); |
| 84 | } |
| 85 | printf("fixup_irq: device %d pin %c irq %d\n", |
| 86 | PCI_DEV(dev), 'A' + pin, sc520_pci_ints[pin]); |
| 87 | } |
| 88 | |
| 89 | static struct pci_controller enet_hose = { |
| 90 | fixup_irq: pci_enet_fixup_irq, |
| 91 | }; |
| 92 | |
| 93 | void pci_init_board(void) |
| 94 | { |
| 95 | pci_sc520_init(&enet_hose); |
| 96 | } |
Graeme Russ | 21e67e7 | 2010-04-24 00:05:54 +1000 | [diff] [blame] | 97 | |
| 98 | int pci_set_regions(struct pci_controller *hose) |
| 99 | { |
| 100 | /* System memory space */ |
| 101 | pci_set_region(hose->regions + 0, |
| 102 | SC520_PCI_MEMORY_BUS, |
| 103 | SC520_PCI_MEMORY_PHYS, |
| 104 | SC520_PCI_MEMORY_SIZE, |
| 105 | PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); |
| 106 | |
| 107 | /* ISA/PCI memory space */ |
| 108 | pci_set_region(hose->regions + 1, |
| 109 | SC520_ISA_MEM_BUS, |
| 110 | SC520_ISA_MEM_PHYS, |
| 111 | SC520_ISA_MEM_SIZE, |
| 112 | PCI_REGION_MEM); |
| 113 | |
| 114 | /* PCI I/O space */ |
| 115 | pci_set_region(hose->regions + 2, |
| 116 | SC520_PCI_IO_BUS, |
| 117 | SC520_PCI_IO_PHYS, |
| 118 | SC520_PCI_IO_SIZE, |
| 119 | PCI_REGION_IO); |
| 120 | |
| 121 | /* ISA/PCI I/O space */ |
| 122 | pci_set_region(hose->regions + 3, |
| 123 | SC520_ISA_IO_BUS, |
| 124 | SC520_ISA_IO_PHYS, |
| 125 | SC520_ISA_IO_SIZE, |
| 126 | PCI_REGION_IO); |
| 127 | |
| 128 | return 4; |
| 129 | } |