| Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 1 | if ARCH_ROCKCHIP |
| 2 | |
| Heiko Stübner | 041cdb5 | 2016-07-16 00:17:15 +0200 | [diff] [blame^] | 3 | config ROCKCHIP_RK3036 |
| 4 | bool "Support Rockchip RK3036" |
| 5 | select CPU_V7 |
| 6 | help |
| 7 | The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 |
| 8 | including NEON and GPU, Mali-400 graphics, several DDR3 options |
| 9 | and video codec support. Peripherals include Gigabit Ethernet, |
| 10 | USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. |
| 11 | |
| Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 12 | config ROCKCHIP_RK3288 |
| 13 | bool "Support Rockchip RK3288" |
| Andreas Färber | e0f5dbc | 2016-07-14 05:09:26 +0200 | [diff] [blame] | 14 | select CPU_V7 |
| Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 15 | help |
| 16 | The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 |
| 17 | including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two |
| 18 | video interfaces supporting HDMI and eDP, several DDR3 options |
| 19 | and video codec support. Peripherals include Gigabit Ethernet, |
| 20 | USB2 host and OTG, SDIO, I2S, UART,s, SPI, I2C and PWMs. |
| 21 | |
| Xu Ziyuan | b47ea79 | 2016-07-12 19:09:49 +0800 | [diff] [blame] | 22 | config ROCKCHIP_SPL_BACK_TO_BROM |
| 23 | bool "SPL returns to bootrom" |
| 24 | default y if ROCKCHIP_RK3036 |
| 25 | help |
| 26 | Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, |
| 27 | SPL will return to the boot rom, which will then load the U-Boot |
| 28 | binary to keep going on. |
| 29 | |
| huang lin | be1d5e0 | 2015-11-17 14:20:27 +0800 | [diff] [blame] | 30 | source "arch/arm/mach-rockchip/rk3036/Kconfig" |
| Heiko Stübner | 041cdb5 | 2016-07-16 00:17:15 +0200 | [diff] [blame^] | 31 | source "arch/arm/mach-rockchip/rk3288/Kconfig" |
| Simon Glass | 2444dae | 2015-08-30 16:55:38 -0600 | [diff] [blame] | 32 | endif |