blob: 0fd4223e902df01ff69d683614e47e494f5726c8 [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
Wolfgang Denkd87080b2006-03-31 18:32:53 +02005 * (C) Copyright 2001-2006
wdenkc6097192002-11-03 00:24:07 +00006 * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
7
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#include <common.h>
28#include <mpc824x.h>
29#include <asm/processor.h>
30#include <pci.h>
Ben Warren8ca0b3f2008-08-31 10:45:44 -070031#include <netdev.h>
wdenkc6097192002-11-03 00:24:07 +000032
Wolfgang Denkd87080b2006-03-31 18:32:53 +020033DECLARE_GLOBAL_DATA_PTR;
34
wdenkc6097192002-11-03 00:24:07 +000035#define BOARD_REV_REG 0xFE80002B
36
37int checkboard (void)
38{
wdenkc6097192002-11-03 00:24:07 +000039 char revision = *(volatile char *)(BOARD_REV_REG);
40 char buf[32];
41
42 puts ("Board: CU824 ");
43 printf("Revision %d ", revision);
44 printf("Local Bus at %s MHz\n", strmhz(buf, gd->bus_clk));
45
46 return 0;
47}
48
Becky Bruce9973e3c2008-06-09 16:03:40 -050049phys_size_t initdram(int board_type)
wdenkc6097192002-11-03 00:24:07 +000050{
wdenkc83bf6a2004-01-06 22:38:14 +000051 long size;
52 long new_bank0_end;
53 long mear1;
54 long emear1;
wdenkc6097192002-11-03 00:24:07 +000055
wdenkc83bf6a2004-01-06 22:38:14 +000056 size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
wdenkc6097192002-11-03 00:24:07 +000057
wdenkc83bf6a2004-01-06 22:38:14 +000058 new_bank0_end = size - 1;
59 mear1 = mpc824x_mpc107_getreg(MEAR1);
60 emear1 = mpc824x_mpc107_getreg(EMEAR1);
61 mear1 = (mear1 & 0xFFFFFF00) |
62 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
63 emear1 = (emear1 & 0xFFFFFF00) |
64 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
65 mpc824x_mpc107_setreg(MEAR1, mear1);
66 mpc824x_mpc107_setreg(EMEAR1, emear1);
wdenkc6097192002-11-03 00:24:07 +000067
wdenkc83bf6a2004-01-06 22:38:14 +000068 return (size);
wdenkc6097192002-11-03 00:24:07 +000069}
70
71/*
72 * Initialize PCI Devices, report devices found.
73 */
74#ifndef CONFIG_PCI_PNP
75static struct pci_config_table pci_sandpoint_config_table[] = {
wdenk3bac3512003-03-12 10:41:04 +000076 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
77 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
78 PCI_ENET0_MEMADDR,
79 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
80
wdenkc6097192002-11-03 00:24:07 +000081 { }
82};
83#endif
84
85struct pci_controller hose = {
86#ifndef CONFIG_PCI_PNP
87 config_table: pci_sandpoint_config_table,
88#endif
89};
90
stroesead10dd92003-02-14 11:21:23 +000091void pci_init_board(void)
wdenkc6097192002-11-03 00:24:07 +000092{
93 pci_mpc824x_init(&hose);
94}
Ben Warren8ca0b3f2008-08-31 10:45:44 -070095
96int board_eth_init(bd_t *bis)
97{
98 return pci_eth_init(bis);
99}