blob: eccca43a423be92cd4a164d07493c70dfb38802e [file] [log] [blame]
Bo Shenc5e88852013-11-15 11:12:38 +08001/*
2 * (C) Copyright 2002
3 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
4 *
5 * (C) Copyright 2010
6 * Texas Instruments, <www.ti.com>
7 * Aneesh V <aneesh@ti.com>
8 *
9 * (C) 2013 Atmel Corporation
10 * Bo Shen <voice.shen@atmel.com>
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE, \
16 LENGTH = CONFIG_SPL_MAX_SIZE }
17MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
18 LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
19
20OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
21OUTPUT_ARCH(arm)
22ENTRY(_start)
23SECTIONS
24{
25 .text :
26 {
27 __start = .;
Benoît Thébaudeaueeadd3f2014-08-21 15:43:11 +020028 *(.vectors)
Bo Shenc5e88852013-11-15 11:12:38 +080029 arch/arm/cpu/armv7/start.o (.text*)
30 *(.text*)
31 } >.sram
32
33 . = ALIGN(4);
34 .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
35
36 . = ALIGN(4);
37 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
38
39 . = ALIGN(4);
40 __image_copy_end = .;
Albert ARIBAUDd0b5d9d2014-02-22 17:53:42 +010041
42 .end :
43 {
44 *(.__end)
45 } >.sram
Bo Shenc5e88852013-11-15 11:12:38 +080046
47 .bss :
48 {
49 . = ALIGN(4);
50 __bss_start = .;
51 *(.bss*)
52 . = ALIGN(4);
53 __bss_end = .;
54 } >.sdram
55}