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wdenk3d3befa2004-03-14 15:06:13 +00001/*
2 * (C) Copyright 2003
3 * Texas Instruments.
4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
6 *
7 * (C) Copyright 2004
8 * ARM Ltd.
9 * Philippe Robin, <philippe.robin@arm.com>
10 * Configuration for Compact Integrator board.
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#ifndef __CONFIG_H
32#define __CONFIG_H
33
Linus Walleij7c0e4832012-01-31 12:20:17 +000034/* Integrator-specific configuration */
Linus Walleij23b3ae02011-08-12 00:28:57 +000035#define CONFIG_INTEGRATOR
Linus Walleij7c0e4832012-01-31 12:20:17 +000036#define CONFIG_ARCH_CINTEGRATOR
37#define CONFIG_CM_INIT
38#define CONFIG_CM_REMAP
39#define CONFIG_CM_SPD_DETECT
40
wdenk3d3befa2004-03-14 15:06:13 +000041/*
42 * High Level Configuration Options
43 * (easy to change)
44 */
Linus Walleija4c15c02011-11-09 06:14:20 +000045#define CONFIG_SYS_TEXT_BASE 0x01000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020046#define CONFIG_SYS_MEMTEST_START 0x100000
47#define CONFIG_SYS_MEMTEST_END 0x10000000
48#define CONFIG_SYS_HZ 1000
49#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer 1 is clocked at 1Mhz */
50#define CONFIG_SYS_TIMERBASE 0x13000100
wdenk3d3befa2004-03-14 15:06:13 +000051
Wolfgang Denk74f43042005-09-25 01:48:28 +020052#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
wdenk3d3befa2004-03-14 15:06:13 +000053#define CONFIG_SETUP_MEMORY_TAGS 1
Wolfgang Denk74f43042005-09-25 01:48:28 +020054#define CONFIG_MISC_INIT_R 1 /* call misc_init_r during start up */
Linus Walleij7c0e4832012-01-31 12:20:17 +000055
wdenk3d3befa2004-03-14 15:06:13 +000056/*
57 * Size of malloc() pool
58 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020059#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
wdenk3d3befa2004-03-14 15:06:13 +000060
61/*
62 * Hardware drivers
63 */
Ben Warren7194ab82009-10-04 22:37:03 -070064#define CONFIG_SMC91111
wdenk3d3befa2004-03-14 15:06:13 +000065#define CONFIG_SMC_USE_32_BIT
66#define CONFIG_SMC91111_BASE 0xC8000000
67#undef CONFIG_SMC91111_EXT_PHY
68
69/*
70 * NS16550 Configuration
71 */
Andreas Engel48d01922008-09-08 14:30:53 +020072#define CONFIG_PL011_SERIAL
wdenk6705d812004-08-02 23:22:59 +000073#define CONFIG_PL011_CLOCK 14745600
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020074#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, (void *)CONFIG_SYS_SERIAL1 }
wdenk3d3befa2004-03-14 15:06:13 +000075#define CONFIG_CONS_INDEX 0
wdenk5a95f6f2005-01-12 00:38:03 +000076#define CONFIG_BAUDRATE 38400
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020077#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
78#define CONFIG_SYS_SERIAL0 0x16000000
79#define CONFIG_SYS_SERIAL1 0x17000000
wdenk3d3befa2004-03-14 15:06:13 +000080
Jon Loeliger1d2c6bc2007-07-04 22:32:32 -050081
wdenk5a95f6f2005-01-12 00:38:03 +000082/*
Jon Loeliger079a1362007-07-10 10:12:10 -050083 * BOOTP options
84 */
85#define CONFIG_BOOTP_BOOTFILESIZE
86#define CONFIG_BOOTP_BOOTPATH
87#define CONFIG_BOOTP_GATEWAY
88#define CONFIG_BOOTP_HOSTNAME
89
90
91/*
Jon Loeliger1d2c6bc2007-07-04 22:32:32 -050092 * Command line configuration.
93 */
Linus Walleij7c0e4832012-01-31 12:20:17 +000094#include <config_cmd_default.h>
Jon Loeliger1d2c6bc2007-07-04 22:32:32 -050095
wdenk3d3befa2004-03-14 15:06:13 +000096#define CONFIG_BOOTDELAY 2
Linus Walleij7c0e4832012-01-31 12:20:17 +000097#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0"
98#define CONFIG_BOOTCOMMAND "tftpboot ; bootm"
99#define CONFIG_SERVERIP 192.168.1.100
100#define CONFIG_IPADDR 192.168.1.104
101#define CONFIG_BOOTFILE "uImage"
Wolfgang Denk74f43042005-09-25 01:48:28 +0200102
wdenk3d3befa2004-03-14 15:06:13 +0000103/*
104 * Miscellaneous configurable options
105 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200106#define CONFIG_SYS_LONGHELP /* undef to save memory */
107#define CONFIG_SYS_PROMPT "Integrator-CP # " /* Monitor Command Prompt */
108#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
wdenk3d3befa2004-03-14 15:06:13 +0000109/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200110#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
111#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
112#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/
wdenk3d3befa2004-03-14 15:06:13 +0000113
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200114#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
wdenk3d3befa2004-03-14 15:06:13 +0000115
116/*-----------------------------------------------------------------------
117 * Stack sizes
118 *
119 * The stack sizes are set up in start.S using the settings below
120 */
121#define CONFIG_STACKSIZE (128*1024) /* regular stack */
122#ifdef CONFIG_USE_IRQ
123#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
124#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
125#endif
126
127/*-----------------------------------------------------------------------
128 * Physical Memory Map
129 */
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200130#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
131#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200132#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
Linus Walleij9ecefbf2011-07-25 01:52:00 +0000133#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
134#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
135#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
136 CONFIG_SYS_INIT_RAM_SIZE - \
137 GENERATED_GBL_DATA_SIZE)
138#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
wdenk3d3befa2004-03-14 15:06:13 +0000139
140/*-----------------------------------------------------------------------
141 * FLASH and environment organization
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200142
143 * Top varies according to amount fitted
144 * Reserve top 4 blocks of flash
145 * - ARM Boot Monitor
146 * - Unused
147 * - SIB block
148 * - U-Boot environment
149 *
150 * Base is always 0x24000000
151
wdenk3d3befa2004-03-14 15:06:13 +0000152 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200153#define CONFIG_SYS_FLASH_BASE 0x24000000
Jean-Christophe PLAGNIOL-VILLARD46937b22009-05-17 00:58:36 +0200154#define CONFIG_SYS_FLASH_CFI 1
155#define CONFIG_FLASH_CFI_DRIVER 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156#define CONFIG_SYS_MAX_FLASH_SECT 64
157#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
Jean-Christophe PLAGNIOL-VILLARD46937b22009-05-17 00:58:36 +0200158#define PHYS_FLASH_SIZE 0x01000000 /* 16MB */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200159#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
160#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
wdenk3d3befa2004-03-14 15:06:13 +0000161
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162#define CONFIG_SYS_MONITOR_LEN 0x00100000
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200163#define CONFIG_ENV_IS_IN_FLASH 1
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200164
165/*
166 * Move up the U-Boot & monitor area if more flash is fitted.
167 * If this U-Boot is to be run on Integrators with varying flash sizes,
Marcel Ziswiler7817cb22007-12-30 03:30:46 +0100168 * drivers/mtd/cfi_flash.c::flash_init() can read the Integrator CP_FLASHPROG
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200169 * register and dynamically assign CONFIG_ENV_ADDR & CONFIG_SYS_MONITOR_BASE
170 * - CONFIG_SYS_MONITOR_BASE is set to indicate that the environment is not
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200171 * embedded in the boot monitor(s) area
172 */
173#if ( PHYS_FLASH_SIZE == 0x04000000 )
174
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200175#define CONFIG_ENV_ADDR 0x27F00000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200176#define CONFIG_SYS_MONITOR_BASE 0x27F40000
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200177
178#elif (PHYS_FLASH_SIZE == 0x02000000 )
179
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200180#define CONFIG_ENV_ADDR 0x25F00000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#define CONFIG_SYS_MONITOR_BASE 0x25F40000
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200182
183#else
184
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200185#define CONFIG_ENV_ADDR 0x24F00000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200186#define CONFIG_SYS_MONITOR_BASE 0x27F40000
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200187
188#endif
189
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200190#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */
191#define CONFIG_ENV_SIZE 8192 /* 8KB */
wdenk5a95f6f2005-01-12 00:38:03 +0000192
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200193/*
194 * The ARM boot monitor initializes the board.
195 * However, the default U-Boot code also performs the initialization.
196 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
197 * - see documentation supplied with board for details of how to choose the
198 * image to run at reset/power up
199 * e.g. whether the ARM Boot Monitor runs before U-Boot
200
201#define CONFIG_SKIP_LOWLEVEL_INIT
202
203 */
204
205/*
206 * The ARM boot monitor does not relocate U-Boot.
207 * However, the default U-Boot code performs the relocation check,
208 * and may relocate the code if the memory map is changed.
209 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
210
211#define SKIP_CONFIG_RELOCATE_UBOOT
212
213 */
Wolfgang Denk74f43042005-09-25 01:48:28 +0200214/*-----------------------------------------------------------------------
215 * There are various dependencies on the core module (CM) fitted
216 * Users should refer to their CM user guide
217 * - when porting adjust u-boot/Makefile accordingly
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200218 * to define the necessary CONFIG_ s for the CM involved
219 * see e.g. cp_926ejs_config
Wolfgang Denk74f43042005-09-25 01:48:28 +0200220 */
221
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200222#include "armcoremodule.h"
Wolfgang Denk74f43042005-09-25 01:48:28 +0200223
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200224/*
225 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
226 * the core module has a CM_INIT register
227 * then the U-Boot initialisation code will
228 * e.g. ARM Boot Monitor or pre-loader is repeated once
229 * (to re-initialise any existing CM_INIT settings to safe values).
230 *
231 * This is usually not the desired behaviour since the platform
232 * will either reboot into the ARM monitor (or pre-loader)
233 * or continuously cycle thru it without U-Boot running,
234 * depending upon the setting of Integrator/CP switch S2-4.
235 *
236 * However it may be needed if Integrator/CP switch S2-1
237 * is set OFF to boot direct into U-Boot.
238 * In that case comment out the line below.
Wolfgang Denkfe7eb5d2005-09-25 02:00:47 +0200239#undef CONFIG_CM_INIT
Wolfgang Denk9b880bd2005-10-04 23:10:28 +0200240 */
Wolfgang Denk74f43042005-09-25 01:48:28 +0200241
wdenk5a95f6f2005-01-12 00:38:03 +0000242#endif /* __CONFIG_H */