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Beniamino Galvanibfcef282016-05-08 08:30:16 +02001/*
2 * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
Simon Glass9d922452017-05-17 17:18:03 -06008#include <dm.h>
Beniamino Galvanibfcef282016-05-08 08:30:16 +02009#include <asm/io.h>
10#include <asm/arch/gxbb.h>
Beniamino Galvanic7757d42016-05-08 08:30:17 +020011#include <asm/arch/sm.h>
Beniamino Galvanibfcef282016-05-08 08:30:16 +020012#include <phy.h>
13
Beniamino Galvanic7757d42016-05-08 08:30:17 +020014#define EFUSE_SN_OFFSET 20
15#define EFUSE_SN_SIZE 16
16#define EFUSE_MAC_OFFSET 52
17#define EFUSE_MAC_SIZE 6
18
Beniamino Galvanibfcef282016-05-08 08:30:16 +020019int board_init(void)
20{
21 return 0;
22}
23
Beniamino Galvanibfcef282016-05-08 08:30:16 +020024int misc_init_r(void)
25{
Beniamino Galvanic7757d42016-05-08 08:30:17 +020026 u8 mac_addr[EFUSE_MAC_SIZE];
Martin Böhcb86d372017-06-23 13:40:00 +000027 char serial[EFUSE_SN_SIZE];
Beniamino Galvanic7757d42016-05-08 08:30:17 +020028 ssize_t len;
29
Beniamino Galvanibfcef282016-05-08 08:30:16 +020030 /* Set RGMII mode */
31 setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
32 GXBB_ETH_REG_0_TX_PHASE(1) |
33 GXBB_ETH_REG_0_TX_RATIO(4) |
34 GXBB_ETH_REG_0_PHY_CLK_EN |
35 GXBB_ETH_REG_0_CLK_EN);
36
37 /* Enable power and clock gate */
38 setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
39 clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
40
41 /* Reset PHY on GPIOZ_14 */
42 clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
43 clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
44 mdelay(10);
45 setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
46
Beniamino Galvanic7757d42016-05-08 08:30:17 +020047 if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
48 len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
49 mac_addr, EFUSE_MAC_SIZE);
50 if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
51 eth_setenv_enetaddr("ethaddr", mac_addr);
52 }
53
Martin Böhcb86d372017-06-23 13:40:00 +000054 if (!getenv("serial#")) {
55 len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
56 EFUSE_SN_SIZE);
57 if (len == EFUSE_SN_SIZE)
Simon Glass382bee52017-08-03 12:22:09 -060058 env_set("serial#", serial);
Martin Böhcb86d372017-06-23 13:40:00 +000059 }
60
Beniamino Galvanibfcef282016-05-08 08:30:16 +020061 return 0;
62}