| /* |
| * Cavium Thunder DTS file - Thunder SoC description |
| * |
| * Copyright (C) 2014, Cavium Inc. |
| * |
| * SPDX-License-Identifier: GPL-2.0+ or X11 |
| * |
| */ |
| |
| / { |
| compatible = "cavium,thunder-88xx"; |
| interrupt-parent = <&gic0>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| psci { |
| compatible = "arm,psci-0.2"; |
| method = "smc"; |
| }; |
| |
| cpus { |
| #address-cells = <2>; |
| #size-cells = <0>; |
| |
| cpu@000 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x000>; |
| enable-method = "psci"; |
| }; |
| cpu@001 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x001>; |
| enable-method = "psci"; |
| }; |
| cpu@002 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x002>; |
| enable-method = "psci"; |
| }; |
| cpu@003 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x003>; |
| enable-method = "psci"; |
| }; |
| cpu@004 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x004>; |
| enable-method = "psci"; |
| }; |
| cpu@005 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x005>; |
| enable-method = "psci"; |
| }; |
| cpu@006 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x006>; |
| enable-method = "psci"; |
| }; |
| cpu@007 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x007>; |
| enable-method = "psci"; |
| }; |
| cpu@008 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x008>; |
| enable-method = "psci"; |
| }; |
| cpu@009 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x009>; |
| enable-method = "psci"; |
| }; |
| cpu@00a { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x00a>; |
| enable-method = "psci"; |
| }; |
| cpu@00b { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x00b>; |
| enable-method = "psci"; |
| }; |
| cpu@00c { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x00c>; |
| enable-method = "psci"; |
| }; |
| cpu@00d { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x00d>; |
| enable-method = "psci"; |
| }; |
| cpu@00e { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x00e>; |
| enable-method = "psci"; |
| }; |
| cpu@00f { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x00f>; |
| enable-method = "psci"; |
| }; |
| cpu@100 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x100>; |
| enable-method = "psci"; |
| }; |
| cpu@101 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x101>; |
| enable-method = "psci"; |
| }; |
| cpu@102 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x102>; |
| enable-method = "psci"; |
| }; |
| cpu@103 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x103>; |
| enable-method = "psci"; |
| }; |
| cpu@104 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x104>; |
| enable-method = "psci"; |
| }; |
| cpu@105 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x105>; |
| enable-method = "psci"; |
| }; |
| cpu@106 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x106>; |
| enable-method = "psci"; |
| }; |
| cpu@107 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x107>; |
| enable-method = "psci"; |
| }; |
| cpu@108 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x108>; |
| enable-method = "psci"; |
| }; |
| cpu@109 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x109>; |
| enable-method = "psci"; |
| }; |
| cpu@10a { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x10a>; |
| enable-method = "psci"; |
| }; |
| cpu@10b { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x10b>; |
| enable-method = "psci"; |
| }; |
| cpu@10c { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x10c>; |
| enable-method = "psci"; |
| }; |
| cpu@10d { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x10d>; |
| enable-method = "psci"; |
| }; |
| cpu@10e { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x10e>; |
| enable-method = "psci"; |
| }; |
| cpu@10f { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x10f>; |
| enable-method = "psci"; |
| }; |
| cpu@200 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x200>; |
| enable-method = "psci"; |
| }; |
| cpu@201 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x201>; |
| enable-method = "psci"; |
| }; |
| cpu@202 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x202>; |
| enable-method = "psci"; |
| }; |
| cpu@203 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x203>; |
| enable-method = "psci"; |
| }; |
| cpu@204 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x204>; |
| enable-method = "psci"; |
| }; |
| cpu@205 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x205>; |
| enable-method = "psci"; |
| }; |
| cpu@206 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x206>; |
| enable-method = "psci"; |
| }; |
| cpu@207 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x207>; |
| enable-method = "psci"; |
| }; |
| cpu@208 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x208>; |
| enable-method = "psci"; |
| }; |
| cpu@209 { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x209>; |
| enable-method = "psci"; |
| }; |
| cpu@20a { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x20a>; |
| enable-method = "psci"; |
| }; |
| cpu@20b { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x20b>; |
| enable-method = "psci"; |
| }; |
| cpu@20c { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x20c>; |
| enable-method = "psci"; |
| }; |
| cpu@20d { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x20d>; |
| enable-method = "psci"; |
| }; |
| cpu@20e { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x20e>; |
| enable-method = "psci"; |
| }; |
| cpu@20f { |
| device_type = "cpu"; |
| compatible = "cavium,thunder", "arm,armv8"; |
| reg = <0x0 0x20f>; |
| enable-method = "psci"; |
| }; |
| }; |
| |
| timer { |
| compatible = "arm,armv8-timer"; |
| interrupts = <1 13 0xff01>, |
| <1 14 0xff01>, |
| <1 11 0xff01>, |
| <1 10 0xff01>; |
| }; |
| |
| soc { |
| compatible = "simple-bus"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| |
| refclk50mhz: refclk50mhz { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <50000000>; |
| clock-output-names = "refclk50mhz"; |
| }; |
| |
| gic0: interrupt-controller@8010,00000000 { |
| compatible = "arm,gic-v3"; |
| #interrupt-cells = <3>; |
| interrupt-controller; |
| reg = <0x8010 0x00000000 0x0 0x010000>, /* GICD */ |
| <0x8010 0x80000000 0x0 0x600000>; /* GICR */ |
| interrupts = <1 9 0xf04>; |
| }; |
| |
| uaa0: serial@87e0,24000000 { |
| compatible = "arm,pl011", "arm,primecell"; |
| reg = <0x87e0 0x24000000 0x0 0x1000>; |
| interrupts = <1 21 4>; |
| clocks = <&refclk50mhz>; |
| clock-names = "apb_pclk"; |
| uboot,skip-init; |
| }; |
| |
| uaa1: serial@87e0,25000000 { |
| compatible = "arm,pl011", "arm,primecell"; |
| reg = <0x87e0 0x25000000 0x0 0x1000>; |
| interrupts = <1 22 4>; |
| clocks = <&refclk50mhz>; |
| clock-names = "apb_pclk"; |
| uboot,skip-init; |
| }; |
| }; |
| }; |