| /* |
| * Samsung's Exynos4 SoC common device tree source |
| * |
| * Copyright (c) 2014 Samsung Electronics Co., Ltd. |
| * http://www.samsung.com |
| * |
| * SPDX-License-Identifier: GPL-2.0+ |
| */ |
| |
| #include "skeleton.dtsi" |
| |
| / { |
| combiner: interrupt-controller@10440000 { |
| compatible = "samsung,exynos4210-combiner"; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| reg = <0x10440000 0x1000>; |
| }; |
| |
| serial@13800000 { |
| compatible = "samsung,exynos4210-uart"; |
| reg = <0x13800000 0x3c>; |
| id = <0>; |
| }; |
| |
| serial@13810000 { |
| compatible = "samsung,exynos4210-uart"; |
| reg = <0x13810000 0x3c>; |
| id = <1>; |
| }; |
| |
| serial@13820000 { |
| compatible = "samsung,exynos4210-uart"; |
| reg = <0x13820000 0x3c>; |
| id = <2>; |
| }; |
| |
| serial@13830000 { |
| compatible = "samsung,exynos4210-uart"; |
| reg = <0x13830000 0x3c>; |
| id = <3>; |
| }; |
| |
| serial@13840000 { |
| compatible = "samsung,exynos4210-uart"; |
| reg = <0x13840000 0x3c>; |
| id = <4>; |
| }; |
| |
| i2c@13860000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x13860000 0x100>; |
| interrupts = <0 56 0>; |
| }; |
| |
| i2c@13870000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x13870000 0x100>; |
| interrupts = <1 57 0>; |
| }; |
| |
| i2c@13880000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x13880000 0x100>; |
| interrupts = <2 58 0>; |
| }; |
| |
| i2c@13890000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x13890000 0x100>; |
| interrupts = <3 59 0>; |
| }; |
| |
| i2c@138a0000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x138a0000 0x100>; |
| interrupts = <4 60 0>; |
| }; |
| |
| i2c@138b0000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x138b0000 0x100>; |
| interrupts = <5 61 0>; |
| }; |
| |
| i2c@138c0000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x138c0000 0x100>; |
| interrupts = <6 62 0>; |
| }; |
| |
| i2c@138d0000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "samsung,s3c2440-i2c"; |
| reg = <0x138d0000 0x100>; |
| interrupts = <7 63 0>; |
| }; |
| |
| sdhci@12510000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "samsung,exynos-mmc"; |
| reg = <0x12510000 0x1000>; |
| interrupts = <0 75 0>; |
| }; |
| |
| sdhci@12520000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "samsung,exynos-mmc"; |
| reg = <0x12520000 0x1000>; |
| interrupts = <0 76 0>; |
| }; |
| |
| sdhci@12530000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "samsung,exynos-mmc"; |
| reg = <0x12530000 0x1000>; |
| interrupts = <0 77 0>; |
| }; |
| |
| sdhci@12540000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "samsung,exynos-mmc"; |
| reg = <0x12540000 0x1000>; |
| interrupts = <0 78 0>; |
| }; |
| |
| dwmmc@12550000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "samsung,exynos-dwmmc"; |
| reg = <0x12550000 0x1000>; |
| interrupts = <0 131 0>; |
| }; |
| |
| }; |