| /* |
| * Copyright (C) 2014 Eukréa Electromatique |
| * Author: Eric Bénard <eric@eukrea.com> |
| * |
| * Configuration settings for the Embest RIoTboard |
| * |
| * based on mx6*sabre*.h which are : |
| * Copyright (C) 2012 Freescale Semiconductor, Inc. |
| * |
| * SPDX-License-Identifier: GPL-2.0+ |
| */ |
| |
| #ifndef __RIOTBOARD_CONFIG_H |
| #define __RIOTBOARD_CONFIG_H |
| |
| #define CONFIG_MXC_UART_BASE UART2_BASE |
| #define CONFIG_CONSOLE_DEV "ttymxc1" |
| #define CONFIG_MMCROOT "/dev/mmcblk1p2" |
| |
| #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) |
| |
| #define CONFIG_IMX6_THERMAL |
| |
| /* Size of malloc() pool */ |
| #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) |
| |
| #define CONFIG_BOARD_EARLY_INIT_F |
| #define CONFIG_BOARD_LATE_INIT |
| |
| #define CONFIG_MXC_UART |
| |
| #define CONFIG_CMD_FUSE |
| #ifdef CONFIG_CMD_FUSE |
| #define CONFIG_MXC_OCOTP |
| #endif |
| |
| /* I2C Configs */ |
| #define CONFIG_CMD_I2C |
| #define CONFIG_SYS_I2C |
| #define CONFIG_SYS_I2C_MXC |
| #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
| #define CONFIG_SYS_I2C_SPEED 100000 |
| |
| /* USB Configs */ |
| #define CONFIG_CMD_USB |
| #define CONFIG_USB_EHCI |
| #define CONFIG_USB_EHCI_MX6 |
| #define CONFIG_USB_STORAGE |
| #define CONFIG_USB_HOST_ETHER |
| #define CONFIG_USB_ETHER_ASIX |
| #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ |
| #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| #define CONFIG_MXC_USB_FLAGS 0 |
| |
| /* MMC Configs */ |
| #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| |
| #define CONFIG_FEC_MXC |
| #define CONFIG_MII |
| #define IMX_FEC_BASE ENET_BASE_ADDR |
| #define CONFIG_FEC_XCV_TYPE RGMII |
| #define CONFIG_ETHPRIME "FEC" |
| #define CONFIG_FEC_MXC_PHYADDR 4 |
| |
| #define CONFIG_PHYLIB |
| #define CONFIG_PHY_ATHEROS |
| |
| #define CONFIG_CMD_SF |
| #ifdef CONFIG_CMD_SF |
| #define CONFIG_SPI_FLASH |
| #define CONFIG_SPI_FLASH_SST |
| #define CONFIG_MXC_SPI |
| #define CONFIG_SF_DEFAULT_BUS 0 |
| #define CONFIG_SF_DEFAULT_CS 0 |
| #define CONFIG_SF_DEFAULT_SPEED 20000000 |
| #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 |
| #endif |
| |
| /* Command definition */ |
| #undef CONFIG_CMD_FPGA |
| |
| #define CONFIG_CMD_BMODE |
| #define CONFIG_CMD_SETEXPR |
| |
| #define CONFIG_ARP_TIMEOUT 200UL |
| |
| /* Print Buffer Size */ |
| #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| |
| #define CONFIG_SYS_MEMTEST_START 0x10000000 |
| #define CONFIG_SYS_MEMTEST_END 0x10010000 |
| #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 |
| |
| #define CONFIG_STACKSIZE (128 * 1024) |
| |
| /* Physical Memory Map */ |
| #define CONFIG_NR_DRAM_BANKS 1 |
| #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| |
| #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| |
| #define CONFIG_SYS_INIT_SP_OFFSET \ |
| (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| #define CONFIG_SYS_INIT_SP_ADDR \ |
| (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| |
| /* Environment organization */ |
| #define CONFIG_ENV_SIZE (8 * 1024) |
| |
| #if defined(CONFIG_ENV_IS_IN_MMC) |
| /* RiOTboard */ |
| #define CONFIG_FDTFILE "imx6dl-riotboard.dtb" |
| #define CONFIG_SYS_FSL_USDHC_NUM 3 |
| #define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */ |
| #define CONFIG_ENV_OFFSET (6 * 64 * 1024) |
| #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ |
| #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) |
| /* MarSBoard */ |
| #define CONFIG_FDTFILE "imx6q-marsboard.dtb" |
| #define CONFIG_SYS_FSL_USDHC_NUM 2 |
| #define CONFIG_ENV_OFFSET (768 * 1024) |
| #define CONFIG_ENV_SECT_SIZE (8 * 1024) |
| #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS |
| #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS |
| #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE |
| #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED |
| #endif |
| |
| #ifndef CONFIG_SYS_DCACHE_OFF |
| #define CONFIG_CMD_CACHE |
| #endif |
| |
| /* Framebuffer */ |
| #define CONFIG_VIDEO |
| #define CONFIG_VIDEO_IPUV3 |
| #define CONFIG_CFB_CONSOLE |
| #define CONFIG_VGA_AS_SINGLE_DEVICE |
| #define CONFIG_SYS_CONSOLE_IS_IN_ENV |
| #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE |
| #define CONFIG_VIDEO_BMP_RLE8 |
| #define CONFIG_SPLASH_SCREEN |
| #define CONFIG_SPLASH_SCREEN_ALIGN |
| #define CONFIG_BMP_16BPP |
| #define CONFIG_VIDEO_LOGO |
| #define CONFIG_VIDEO_BMP_LOGO |
| #define CONFIG_IPUV3_CLK 260000000 |
| #define CONFIG_IMX_HDMI |
| #define CONFIG_IMX_VIDEO_SKIP |
| |
| #include <config_distro_defaults.h> |
| #include "mx6_common.h" |
| |
| /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt, |
| * 1M script, 1M pxe and the ramdisk at the end */ |
| #define MEM_LAYOUT_ENV_SETTINGS \ |
| "bootm_size=0x10000000\0" \ |
| "kernel_addr_r=0x12000000\0" \ |
| "fdt_addr_r=0x13000000\0" \ |
| "scriptaddr=0x13100000\0" \ |
| "pxefile_addr_r=0x13200000\0" \ |
| "ramdisk_addr_r=0x13300000\0" |
| |
| #define BOOT_TARGET_DEVICES(func) \ |
| func(MMC, mmc, 0) \ |
| func(MMC, mmc, 1) \ |
| func(MMC, mmc, 2) \ |
| func(USB, usb, 0) \ |
| func(PXE, pxe, na) \ |
| func(DHCP, dhcp, na) |
| |
| #include <config_distro_bootcmd.h> |
| |
| #define CONSOLE_STDIN_SETTINGS \ |
| "stdin=serial\0" |
| |
| #define CONSOLE_STDOUT_SETTINGS \ |
| "stdout=serial\0" \ |
| "stderr=serial\0" |
| |
| #define CONSOLE_ENV_SETTINGS \ |
| CONSOLE_STDIN_SETTINGS \ |
| CONSOLE_STDOUT_SETTINGS |
| |
| #define CONFIG_EXTRA_ENV_SETTINGS \ |
| CONSOLE_ENV_SETTINGS \ |
| MEM_LAYOUT_ENV_SETTINGS \ |
| "fdtfile=" CONFIG_FDTFILE "\0" \ |
| BOOTENV |
| |
| #endif /* __RIOTBOARD_CONFIG_H */ |