| /* |
| * (C) Copyright 2004 |
| * Vincent Dubey, Xa SA, vincent.dubey@xa-ch.com |
| * |
| * (C) Copyright 2002 |
| * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net |
| * |
| * (C) Copyright 2002 |
| * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| * Marius Groeger <mgroeger@sysgo.de> |
| * |
| * SPDX-License-Identifier: GPL-2.0+ |
| */ |
| |
| #include <common.h> |
| #include <netdev.h> |
| #include <asm/arch/pxa.h> |
| |
| DECLARE_GLOBAL_DATA_PTR; |
| |
| /* |
| * Miscelaneous platform dependent initialisations |
| */ |
| |
| int board_init (void) |
| { |
| /* We have RAM, disable cache */ |
| dcache_disable(); |
| icache_disable(); |
| |
| /* arch number of xaeniax */ |
| gd->bd->bi_arch_number = 585; |
| |
| /* adress of boot parameters */ |
| gd->bd->bi_boot_params = 0xa0000100; |
| |
| return 0; |
| } |
| |
| int board_late_init(void) |
| { |
| setenv("stdout", "serial"); |
| setenv("stderr", "serial"); |
| return 0; |
| } |
| |
| int dram_init(void) |
| { |
| pxa2xx_dram_init(); |
| gd->ram_size = PHYS_SDRAM_1_SIZE; |
| return 0; |
| } |
| |
| void dram_init_banksize(void) |
| { |
| gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
| gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
| } |
| |
| #ifdef CONFIG_CMD_NET |
| int board_eth_init(bd_t *bis) |
| { |
| int rc = 0; |
| #ifdef CONFIG_SMC91111 |
| rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); |
| #endif |
| return rc; |
| } |
| #endif |