| /* |
| * Copyright 2011 Freescale Semiconductor, Inc. |
| * |
| * SPDX-License-Identifier: GPL-2.0+ |
| */ |
| |
| #include <asm/imx-common/iomux-v3.h> |
| #include <asm/arch/iomux.h> |
| #include <asm/io.h> |
| #include <asm/arch/clock.h> |
| #include <asm/arch/sys_proto.h> |
| |
| int setup_sata(void) |
| { |
| struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; |
| int ret; |
| |
| if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D)) |
| return 1; |
| |
| ret = enable_sata_clock(); |
| if (ret) |
| return ret; |
| |
| clrsetbits_le32(&iomuxc_regs->gpr[13], |
| IOMUXC_GPR13_SATA_MASK, |
| IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB |
| |IOMUXC_GPR13_SATA_PHY_7_SATA2M |
| |IOMUXC_GPR13_SATA_SPEED_3G |
| |(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT) |
| |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED |
| |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16 |
| |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB |
| |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V |
| |IOMUXC_GPR13_SATA_PHY_1_SLOW); |
| |
| return 0; |
| } |