| Freescale MPC8360EMDS Board |
| ----------------------------------------- |
| 1. Board Switches and Jumpers |
| 1.0 There are four Dual-In-Line Packages(DIP) Switches on MPC8360EMDS board |
| For some reason, the HW designers describe the switch settings |
| in terms of 0 and 1, and then map that to physical switches where |
| the label "On" refers to logic 0 and "Off" is logic 1. |
| |
| Switch bits are numbered 1 through, like, 4 6 8 or 10, but the |
| bits may contribute to signals that are numbered based at 0, |
| and some of those signals may be high-bit-number-0 too. Heed |
| well the names and labels and do not get confused. |
| |
| "Off" == 1 |
| "On" == 0 |
| |
| SW18 is switch 18 as silk-screened onto the board. |
| SW4[8] is the bit labeled 8 on Switch 4. |
| SW2[1:6] refers to bits labeled 1 through 6 in order on switch 2. |
| SW3[7:1] refers to bits labeled 7 through 1 in order on switch 3. |
| SW3[1:8]= 0000_0001 refers to bits labeled 1 through 6 is set as "On" |
| and bits labeled 8 is set as "Off". |
| |
| 1.1 There are three type boards for MPC8360E silicon up to now, They are |
| |
| * MPC8360E-MDS-PB PROTO (a.k.a 8360SYS PROTOTYPE) |
| * MPC8360E-MDS-PB PILOT (a.k.a 8360SYS PILOT) |
| * MPC8360EA-MDS-PB PROTO (a.k.a 8360SYS2 PROTOTYPE) |
| |
| 1.2 For all the MPC8360EMDS Board |
| |
| First, make sure the board default setting is consistent with the |
| document shipped with your board. Then apply the following setting: |
| SW3[1-8]= 0000_0100 (HRCW setting value is performed on local bus) |
| SW4[1-8]= 0011_0000 (Flash boot on local bus) |
| SW9[1-8]= 0110_0110 (PCI Mode enabled. HRCW is read from FLASH) |
| SW10[1-8]= 0000_1000 (core PLL setting) |
| SW11[1-8]= 0000_0100 (SW11 is on the another side of the board) |
| JP6 1-2 |
| on board Oscillator: 66M |
| |
| 1.3 Since different board/chip rev. combinations have AC timing issues, |
| u-boot forces RGMII-ID (RGMII with Internal Delay) mode on by default |
| by the patch (mpc83xx: Disable G1TXCLK, G2TXCLK h/w buffers). |
| |
| When the rev2.x silicon mount on these boards, and if you are using |
| u-boot version after this patch, to make the ethernet interfaces usable, |
| and to enable RGMII-ID on your board, you have to setup the jumpers |
| correctly. |
| |
| * MPC8360E-MDS-PB PROTO |
| nothing to do |
| * MPC8360E-MDS-PB PILOT |
| JP9 and JP8 should be ON |
| * MPC8360EA-MDS-PB PROTO |
| JP2 and JP3 should be ON |
| |
| 2. Memory Map |
| |
| 2.1. The memory map should look pretty much like this: |
| |
| 0x0000_0000 0x7fff_ffff DDR 2G |
| 0x8000_0000 0x8fff_ffff PCI MEM prefetch 256M |
| 0x9000_0000 0x9fff_ffff PCI MEM non-prefetch 256M |
| 0xc000_0000 0xdfff_ffff Empty 512M |
| 0xe000_0000 0xe01f_ffff Int Mem Reg Space 2M |
| 0xe020_0000 0xe02f_ffff Empty 1M |
| 0xe030_0000 0xe03f_ffff PCI IO 1M |
| 0xe040_0000 0xefff_ffff Empty 252M |
| 0xf000_0000 0xf3ff_ffff Local Bus SDRAM 64M |
| 0xf400_0000 0xf7ff_ffff Empty 64M |
| 0xf800_0000 0xf800_7fff BCSR on CS1 32K |
| 0xf800_8000 0xf800_ffff PIB CS4 32K |
| 0xf801_0000 0xf801_7fff PIB CS5 32K |
| 0xfe00_0000 0xfeff_ffff FLASH on CS0 16M |
| |
| |
| 3. Definitions |
| |
| 3.1 Explanation of NEW definitions in: |
| |
| include/configs/MPC8360EMDS.h |
| |
| CONFIG_MPC83xx MPC83xx family for both MPC8349 and MPC8360 |
| CONFIG_MPC8360 MPC8360 specific |
| CONFIG_MPC8360EMDS MPC8360EMDS board specific |
| |
| 4. Compilation |
| |
| MPC8360EMDS shipped with 33.33MHz or 66MHz oscillator(check U41 chip). |
| |
| Assuming you're using BASH shell: |
| |
| export CROSS_COMPILE=your-cross-compile-prefix |
| cd u-boot |
| make distclean |
| make MPC8360EMDS_XX_config |
| make |
| |
| MPC8360EMDS support ATM, PCI in host and slave mode. |
| |
| To make u-boot support ATM : |
| 1) Make MPC8360EMDS_XX_ATM_config |
| |
| To make u-boot support PCI host 66M : |
| 1) DIP SW support PCI mode as described in Section 1.1. |
| 2) Make MPC8360EMDS_XX_HOST_66_config |
| |
| To make u-boot support PCI host 33M : |
| 1) DIP SW setting is similar as Section 1.1, except for SW3[4] is 1 |
| 2) Make MPC8360EMDS_XX_HOST_33_config |
| |
| To make u-boot support PCI slave 66M : |
| 1) DIP SW setting is similar as Section 1.1, except for SW9[3] is 1 |
| 2) Make MPC8360EMDS_XX_SLAVE_config |
| |
| (where XX is: |
| 33 - 33.33MHz oscillator |
| 66 - 66MHz oscillator) |
| |
| 5. Downloading and Flashing Images |
| |
| 5.0 Download over serial line using Kermit: |
| |
| loadb |
| [Drop to kermit: |
| ^\c |
| send <u-boot-bin-image> |
| c |
| ] |
| |
| |
| Or via tftp: |
| |
| tftp 10000 u-boot.bin |
| |
| 5.1 Reflash U-boot Image using U-boot |
| |
| tftp 20000 u-boot.bin |
| protect off fef00000 fef3ffff |
| erase fef00000 fef3ffff |
| |
| cp.b 20000 fef00000 xxxx |
| |
| or |
| |
| cp.b 20000 fef00000 3ffff |
| |
| |
| You have to supply the correct byte count with 'xxxx' from the TFTP result log. |
| Maybe 3ffff will work too, that corresponds to the erased sectors. |
| |
| |
| 6. Notes |
| 1) The console baudrate for MPC8360EMDS is 115200bps. |