| /* |
| * Copyright (C) 2012 Bluegiga Technologies Oy |
| * |
| * Authors: |
| * Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com> |
| * Lauri Hintsala <lauri.hintsala@bluegiga.com> |
| * |
| * Based on m28evk.h: |
| * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> |
| * on behalf of DENX Software Engineering GmbH |
| * |
| * This program is free software; you can redistribute it and/or |
| * modify it under the terms of the GNU General Public License as |
| * published by the Free Software Foundation; either version 2 of |
| * the License, or (at your option) any later version. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| #ifndef __CONFIG_H |
| #define __CONFIG_H |
| |
| /* SoC configurations */ |
| #define CONFIG_MX28 /* i.MX28 SoC */ |
| #define CONFIG_MXS_GPIO /* GPIO control */ |
| #define CONFIG_SYS_HZ 1000 /* Ticks per second */ |
| |
| #define MACH_TYPE_APX4DEVKIT 3712 |
| #define CONFIG_MACH_TYPE MACH_TYPE_APX4DEVKIT |
| |
| #include <asm/arch/regs-base.h> |
| |
| #define CONFIG_SYS_NO_FLASH |
| #define CONFIG_BOARD_EARLY_INIT_F |
| #define CONFIG_ARCH_CPU_INIT |
| #define CONFIG_ARCH_MISC_INIT |
| |
| /* SPL */ |
| #define CONFIG_SPL |
| #define CONFIG_SPL_NO_CPU_SUPPORT_CODE |
| #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" |
| #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" |
| #define CONFIG_SPL_LIBCOMMON_SUPPORT |
| #define CONFIG_SPL_LIBGENERIC_SUPPORT |
| #define CONFIG_SPL_GPIO_SUPPORT |
| |
| /* U-Boot Commands */ |
| #include <config_cmd_default.h> |
| #define CONFIG_DISPLAY_CPUINFO |
| #define CONFIG_DOS_PARTITION |
| |
| #define CONFIG_CMD_CACHE |
| #define CONFIG_CMD_DATE |
| #define CONFIG_CMD_DHCP |
| #define CONFIG_CMD_EXT2 |
| #define CONFIG_CMD_FAT |
| #define CONFIG_CMD_I2C |
| #define CONFIG_CMD_MII |
| #define CONFIG_CMD_MMC |
| #define CONFIG_CMD_NAND |
| #define CONFIG_CMD_NET |
| #define CONFIG_CMD_NFS |
| #define CONFIG_CMD_PING |
| #define CONFIG_CMD_SAVEENV |
| #define CONFIG_CMD_USB |
| |
| /* Memory configurations */ |
| #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ |
| #define PHYS_SDRAM_1 0x40000000 /* Base address */ |
| #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ |
| #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ |
| #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ |
| #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ |
| #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| |
| /* Point initial SP in SRAM so SPL can use it too. */ |
| #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 |
| #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) |
| |
| #define CONFIG_SYS_INIT_SP_OFFSET \ |
| (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| #define CONFIG_SYS_INIT_SP_ADDR \ |
| (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| |
| /* |
| * We need to sacrifice first 4 bytes of RAM here to avoid triggering some |
| * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot |
| * binary. In case there was more of this mess, 0x100 bytes are skipped. |
| */ |
| #define CONFIG_SYS_TEXT_BASE 0x40000100 |
| |
| #define CONFIG_ENV_OVERWRITE |
| |
| /* U-Boot general configurations */ |
| #define CONFIG_SYS_LONGHELP |
| #define CONFIG_SYS_PROMPT "=> " |
| #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ |
| #define CONFIG_SYS_PBSIZE \ |
| (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| /* Print buffer size */ |
| #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ |
| #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| /* Boot argument buffer size */ |
| #define CONFIG_VERSION_VARIABLE /* U-Boot version */ |
| #define CONFIG_AUTO_COMPLETE /* Command auto complete */ |
| #define CONFIG_CMDLINE_EDITING /* Command history etc. */ |
| #define CONFIG_SYS_HUSH_PARSER |
| #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
| #define CONFIG_OF_LIBFDT |
| #define CONFIG_ENV_IS_IN_NAND |
| |
| /* Serial Driver */ |
| #define CONFIG_PL011_SERIAL |
| #define CONFIG_PL011_CLOCK 24000000 |
| #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } |
| #define CONFIG_CONS_INDEX 0 |
| #define CONFIG_BAUDRATE 115200 /* Default baud rate */ |
| #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
| |
| /* DMA */ |
| #define CONFIG_APBH_DMA |
| |
| /* MMC Driver */ |
| #ifdef CONFIG_ENV_IS_IN_MMC |
| #define CONFIG_ENV_OFFSET (256 * 1024) |
| #define CONFIG_ENV_SIZE (16 * 1024) |
| #define CONFIG_SYS_MMC_ENV_DEV 0 |
| #endif |
| |
| #ifdef CONFIG_CMD_MMC |
| #define CONFIG_MMC |
| #define CONFIG_GENERIC_MMC |
| #define CONFIG_MMC_BOUNCE_BUFFER |
| #define CONFIG_MXS_MMC |
| #endif |
| |
| /* NAND Driver */ |
| #ifdef CONFIG_ENV_IS_IN_NAND |
| #define CONFIG_ENV_SECT_SIZE (128 * 1024) |
| #define CONFIG_ENV_SIZE (128 * 1024) |
| #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
| #define CONFIG_ENV_RANGE (384 * 1024) |
| #define CONFIG_ENV_OFFSET 0x120000 |
| #define CONFIG_ENV_OFFSET_REDUND \ |
| (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) |
| #endif |
| |
| #ifdef CONFIG_CMD_NAND |
| #define CONFIG_NAND_MXS |
| #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| #define CONFIG_SYS_NAND_BASE 0x60000000 |
| #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
| |
| #define CONFIG_CMD_UBI |
| #define CONFIG_CMD_UBIFS |
| #define CONFIG_CMD_MTDPARTS |
| #define CONFIG_RBTREE |
| #define CONFIG_LZO |
| #define CONFIG_MTD_DEVICE |
| #define CONFIG_MTD_PARTITIONS |
| #define MTDIDS_DEFAULT "nand0=gpmi-nand" |
| #define MTDPARTS_DEFAULT \ |
| "mtdparts=gpmi-nand:128k(bootstrap),1024k(boot),768k(env),-(root)" |
| #else |
| #define MTDPARTS_DEFAULT "" |
| #endif |
| |
| /* Ethernet on SOC (FEC) */ |
| #ifdef CONFIG_CMD_NET |
| #define CONFIG_NET_MULTI |
| #define CONFIG_ETHPRIME "FEC" |
| #define CONFIG_FEC_MXC |
| #define CONFIG_FEC_MXC_PHYADDR 0 |
| #define IMX_FEC_BASE MXS_ENET0_BASE |
| #define CONFIG_MII |
| #define CONFIG_DISCOVER_PHY |
| #define CONFIG_FEC_XCV_TYPE RMII |
| #endif |
| |
| /* USB */ |
| #ifdef CONFIG_CMD_USB |
| #define CONFIG_USB_EHCI |
| #define CONFIG_USB_EHCI_MXS |
| #define CONFIG_EHCI_MXS_PORT 1 |
| #define CONFIG_EHCI_IS_TDI |
| #define CONFIG_USB_STORAGE |
| #endif |
| |
| /* I2C */ |
| #ifdef CONFIG_CMD_I2C |
| #define CONFIG_I2C_MXS |
| #define CONFIG_HARD_I2C |
| #define CONFIG_SYS_I2C_SPEED 400000 |
| #endif |
| |
| /* RTC */ |
| #if defined(CONFIG_CMD_DATE) |
| #define CONFIG_RTC_PCF8563 |
| #define CONFIG_SYS_I2C_RTC_ADDR 0x51 |
| #endif |
| |
| /* Boot Linux */ |
| #define CONFIG_CMDLINE_TAG |
| #define CONFIG_SETUP_MEMORY_TAGS |
| #define CONFIG_BOOTDELAY 1 |
| #define CONFIG_BOOTFILE "uImage" |
| #define CONFIG_BOOTCOMMAND "run bootcmd_nand" |
| #define CONFIG_LOADADDR 0x41000000 |
| #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| #define CONFIG_SERIAL_TAG |
| #define CONFIG_REVISION_TAG |
| |
| /* Extra Environments */ |
| #define CONFIG_EXTRA_ENV_SETTINGS \ |
| "mtdparts=" MTDPARTS_DEFAULT "\0" \ |
| "verify=no\0" \ |
| "bootcmd=run bootcmd_nand\0" \ |
| "kernelargs=console=tty0 console=ttyAMA0,115200 consoleblank=0\0" \ |
| "bootargs_nand=" \ |
| "setenv bootargs ${kernelargs} ubi.mtd=3,2048 " \ |
| "root=ubi0:rootfs rootfstype=ubifs ${mtdparts} rw\0" \ |
| "bootcmd_nand=" \ |
| "run bootargs_nand && ubi part root 2048 && " \ |
| "ubifsmount rootfs && ubifsload 41000000 boot/uImage && " \ |
| "bootm 41000000\0" \ |
| "bootargs_mmc=" \ |
| "setenv bootargs ${kernelargs} " \ |
| "root=/dev/mmcblk0p2 rootwait ${mtdparts} rw\0" \ |
| "bootcmd_mmc=" \ |
| "run bootargs_mmc && mmc rescan && " \ |
| "ext2load mmc 0:2 41000000 boot/uImage && bootm 41000000\0" \ |
| "" |
| |
| #endif /* __CONFIG_H */ |