| /* |
| * Device Tree Source for UniPhier ProXstream2 SoC |
| * |
| * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
| * |
| * SPDX-License-Identifier: GPL-2.0+ X11 |
| */ |
| |
| /include/ "skeleton.dtsi" |
| |
| / { |
| compatible = "socionext,proxstream2"; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| enable-method = "socionext,uniphier-smp"; |
| |
| cpu@0 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a9"; |
| reg = <0>; |
| }; |
| |
| cpu@1 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a9"; |
| reg = <1>; |
| }; |
| |
| cpu@2 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a9"; |
| reg = <2>; |
| }; |
| |
| cpu@3 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a9"; |
| reg = <3>; |
| }; |
| }; |
| |
| clocks { |
| arm_timer_clk: arm_timer_clk { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <50000000>; |
| }; |
| |
| uart_clk: uart_clk { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <88900000>; |
| }; |
| |
| i2c_clk: i2c_clk { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <50000000>; |
| }; |
| }; |
| |
| soc { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| interrupt-parent = <&intc>; |
| |
| extbus: extbus { |
| compatible = "simple-bus"; |
| #address-cells = <2>; |
| #size-cells = <1>; |
| }; |
| |
| serial0: serial@54006800 { |
| compatible = "socionext,uniphier-uart"; |
| status = "disabled"; |
| reg = <0x54006800 0x40>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart0>; |
| interrupts = <0 33 4>; |
| clocks = <&uart_clk>; |
| clock-frequency = <88900000>; |
| }; |
| |
| serial1: serial@54006900 { |
| compatible = "socionext,uniphier-uart"; |
| status = "disabled"; |
| reg = <0x54006900 0x40>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart1>; |
| interrupts = <0 35 4>; |
| clocks = <&uart_clk>; |
| clock-frequency = <88900000>; |
| }; |
| |
| serial2: serial@54006a00 { |
| compatible = "socionext,uniphier-uart"; |
| status = "disabled"; |
| reg = <0x54006a00 0x40>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart2>; |
| interrupts = <0 37 4>; |
| clocks = <&uart_clk>; |
| clock-frequency = <88900000>; |
| }; |
| |
| serial3: serial@54006b00 { |
| compatible = "socionext,uniphier-uart"; |
| status = "disabled"; |
| reg = <0x54006b00 0x40>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_uart3>; |
| interrupts = <0 177 4>; |
| clocks = <&uart_clk>; |
| clock-frequency = <88900000>; |
| }; |
| |
| i2c0: i2c@58780000 { |
| compatible = "socionext,uniphier-fi2c"; |
| status = "disabled"; |
| reg = <0x58780000 0x80>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c0>; |
| interrupts = <0 41 4>; |
| clocks = <&i2c_clk>; |
| clock-frequency = <100000>; |
| }; |
| |
| i2c1: i2c@58781000 { |
| compatible = "socionext,uniphier-fi2c"; |
| status = "disabled"; |
| reg = <0x58781000 0x80>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c1>; |
| interrupts = <0 42 4>; |
| clocks = <&i2c_clk>; |
| clock-frequency = <100000>; |
| }; |
| |
| i2c2: i2c@58782000 { |
| compatible = "socionext,uniphier-fi2c"; |
| status = "disabled"; |
| reg = <0x58782000 0x80>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c2>; |
| interrupts = <0 43 4>; |
| clocks = <&i2c_clk>; |
| clock-frequency = <100000>; |
| }; |
| |
| i2c3: i2c@58783000 { |
| compatible = "socionext,uniphier-fi2c"; |
| status = "disabled"; |
| reg = <0x58783000 0x80>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&pinctrl_i2c3>; |
| interrupts = <0 44 4>; |
| clocks = <&i2c_clk>; |
| clock-frequency = <100000>; |
| }; |
| |
| /* chip-internal connection for DMD */ |
| i2c4: i2c@58784000 { |
| compatible = "socionext,uniphier-fi2c"; |
| reg = <0x58784000 0x80>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| interrupts = <0 45 4>; |
| clocks = <&i2c_clk>; |
| clock-frequency = <400000>; |
| }; |
| |
| /* chip-internal connection for STM */ |
| i2c5: i2c@58785000 { |
| compatible = "socionext,uniphier-fi2c"; |
| reg = <0x58785000 0x80>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| interrupts = <0 25 4>; |
| clocks = <&i2c_clk>; |
| clock-frequency = <400000>; |
| }; |
| |
| /* chip-internal connection for HDMI */ |
| i2c6: i2c@58786000 { |
| compatible = "socionext,uniphier-fi2c"; |
| reg = <0x58786000 0x80>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| interrupts = <0 26 4>; |
| clocks = <&i2c_clk>; |
| clock-frequency = <400000>; |
| }; |
| |
| system-bus-controller-misc@59800000 { |
| compatible = "socionext,uniphier-system-bus-controller-misc", |
| "syscon"; |
| reg = <0x59800000 0x2000>; |
| }; |
| |
| pinctrl: pinctrl@5f801000 { |
| compatible = "socionext,proxstream2-pinctrl", "syscon"; |
| reg = <0x5f801000 0xe00>; |
| }; |
| |
| timer@60000200 { |
| compatible = "arm,cortex-a9-global-timer"; |
| reg = <0x60000200 0x20>; |
| interrupts = <1 11 0xf04>; |
| clocks = <&arm_timer_clk>; |
| }; |
| |
| timer@60000600 { |
| compatible = "arm,cortex-a9-twd-timer"; |
| reg = <0x60000600 0x20>; |
| interrupts = <1 13 0xf04>; |
| clocks = <&arm_timer_clk>; |
| }; |
| |
| intc: interrupt-controller@60001000 { |
| compatible = "arm,cortex-a9-gic"; |
| #interrupt-cells = <3>; |
| interrupt-controller; |
| reg = <0x60001000 0x1000>, |
| <0x60000100 0x100>; |
| }; |
| }; |
| }; |
| |
| /include/ "uniphier-pinctrl.dtsi" |