| commit | 4c90234586833c0bb4a5d9d3f69a69c8ab09e01f | [log] [tgz] |
|---|---|---|
| author | Vladimir Zapolskiy <vz@mleia.com> | Sun Oct 04 23:18:45 2015 +0100 |
| committer | Tom Rini <trini@konsulko.com> | Sun Oct 11 17:12:13 2015 -0400 |
| tree | 2ac2373905fe23b18d4c4eddc897de6664bc842b | |
| parent | f0aa26f006339969d5e712c50fdb6838333be3b8 [diff] |
lpc32xx: fix calculation of HCLK PLL output clock Execution branches on feedback mode are swapped, this has no effect if default direct mode is on (then p_div is equal to 1 and Fout equals to Fcco), that's why the problem remained unnoticed for a long time. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>