| # SPDX-License-Identifier: GPL-2.0 |
| # |
| # Copyright (c) 2016, NVIDIA CORPORATION. |
| # |
| |
| obj-$(CONFIG_DM_RESET) += reset-uclass.o |
| obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset.o |
| obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o |
| obj-$(CONFIG_STI_RESET) += sti-reset.o |
| obj-$(CONFIG_STM32_RESET) += stm32-reset.o |
| obj-$(CONFIG_TEGRA_CAR_RESET) += tegra-car-reset.o |
| obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o |
| obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o |
| obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o |
| obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o |
| obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o |
| obj-$(CONFIG_RESET_AST2500) += reset-ast2500.o |
| obj-$(CONFIG_RESET_AST2600) += reset-ast2600.o |
| obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o rst-rk3588.o |
| obj-$(CONFIG_RESET_MESON) += reset-meson.o |
| obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o |
| obj-$(CONFIG_RESET_MEDIATEK) += reset-mediatek.o |
| obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o |
| obj-$(CONFIG_RESET_NPCM) += reset-npcm.o |
| obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o |
| obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o |
| obj-$(CONFIG_RESET_IMX7) += reset-imx7.o |
| obj-$(CONFIG_RESET_SIFIVE) += reset-sifive.o |
| obj-$(CONFIG_RESET_SYSCON) += reset-syscon.o |
| obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o |
| obj-$(CONFIG_RESET_SCMI) += reset-scmi.o |
| obj-$(CONFIG_RESET_ZYNQMP) += reset-zynqmp.o |
| obj-$(CONFIG_RESET_DRA7) += reset-dra7.o |
| obj-$(CONFIG_RESET_AT91) += reset-at91.o |
| obj-$(CONFIG_$(SPL_TPL_)RESET_JH7110) += reset-jh7110.o |