| /* |
| * Device Tree Include file for Freescale Layerscape-1043A family SoC. |
| * |
| * Copyright (C) 2015, Freescale Semiconductor |
| * |
| * Mingkai Hu <Mingkai.hu@freescale.com> |
| * |
| * This file is licensed under the terms of the GNU General Public |
| * License version 2. This program is licensed "as is" without any |
| * warranty of any kind, whether express or implied. |
| */ |
| |
| /dts-v1/; |
| /include/ "fsl-ls1043a.dtsi" |
| |
| / { |
| model = "LS1043A QDS Board"; |
| }; |
| |
| &i2c0 { |
| status = "okay"; |
| pca9547@77 { |
| compatible = "philips,pca9547"; |
| reg = <0x77>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| i2c@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x0>; |
| |
| rtc@68 { |
| compatible = "dallas,ds3232"; |
| reg = <0x68>; |
| /* IRQ10_B */ |
| interrupts = <0 150 0x4>; |
| }; |
| }; |
| |
| i2c@2 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x2>; |
| |
| ina220@40 { |
| compatible = "ti,ina220"; |
| reg = <0x40>; |
| shunt-resistor = <1000>; |
| }; |
| |
| ina220@41 { |
| compatible = "ti,ina220"; |
| reg = <0x41>; |
| shunt-resistor = <1000>; |
| }; |
| }; |
| |
| i2c@3 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x3>; |
| |
| eeprom@56 { |
| compatible = "at24,24c512"; |
| reg = <0x56>; |
| }; |
| |
| eeprom@57 { |
| compatible = "at24,24c512"; |
| reg = <0x57>; |
| }; |
| |
| adt7461a@4c { |
| compatible = "adt7461a"; |
| reg = <0x4c>; |
| }; |
| }; |
| }; |
| }; |
| |
| &ifc { |
| #address-cells = <2>; |
| #size-cells = <1>; |
| /* NOR, NAND Flashes and FPGA on board */ |
| ranges = <0x0 0x0 0x0 0x60000000 0x08000000 |
| 0x2 0x0 0x0 0x7e800000 0x00010000 |
| 0x3 0x0 0x0 0x7fb00000 0x00000100>; |
| status = "okay"; |
| |
| nor@0,0 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "cfi-flash"; |
| reg = <0x0 0x0 0x8000000>; |
| bank-width = <2>; |
| device-width = <1>; |
| }; |
| |
| nand@2,0 { |
| compatible = "fsl,ifc-nand"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| reg = <0x1 0x0 0x10000>; |
| }; |
| |
| fpga: board-control@3,0 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "simple-bus"; |
| reg = <0x3 0x0 0x0000100>; |
| bank-width = <1>; |
| device-width = <1>; |
| ranges = <0 3 0 0x100>; |
| }; |
| }; |
| |
| &duart0 { |
| status = "okay"; |
| }; |
| |
| &duart1 { |
| status = "okay"; |
| }; |