Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 1 | diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt |
Jan Kundrát | 2bfe9ee | 2019-12-04 13:42:07 +0100 | [diff] [blame] | 2 | index 8b94aa8f5971..2723e6143aa9 100644 |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 3 | --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt |
| 4 | +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt |
| 5 | @@ -144,3 +144,38 @@ gpio21: gpio@21 { |
| 6 | bias-pull-up; |
| 7 | }; |
| 8 | }; |
| 9 | + |
| 10 | +Line naming |
| 11 | +=========== |
| 12 | + |
| 13 | +Because several gpio_chip instances are hidden below a single device tree |
| 14 | +node, it is necessary to split the names into several child nodes. Ensure |
| 15 | +that the configured addresses match those in the microchip,spi-present-mask: |
| 16 | + |
| 17 | +gpio@0 { |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 18 | + compatible = "microchip,mcp23s17"; |
| 19 | + gpio-controller; |
| 20 | + #gpio-cells = <2>; |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 21 | + /* this bitmask has bits #0 (0x01) and #2 (0x04) set */ |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 22 | + spi-present-mask = <0x05>; |
| 23 | + reg = <0>; |
| 24 | + spi-max-frequency = <1000000>; |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 25 | + |
| 26 | + gpio-bank@1 { |
| 27 | + address = <0>; |
| 28 | + gpio-line-names = |
| 29 | + "GPA0", |
| 30 | + "GPA1", |
| 31 | + ... |
| 32 | + "GPA7", |
| 33 | + "GPB0", |
| 34 | + "GPB1", |
| 35 | + ... |
| 36 | + "GPB7"; |
| 37 | + }; |
| 38 | + |
| 39 | + gpio-bank@2 { |
| 40 | + address = <2>; |
| 41 | + gpio-line-names = ... |
| 42 | + }; |
| 43 | +}; |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 44 | diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c |
| 45 | index 80137c1b3cdc..8d1c49a289eb 100644 |
| 46 | --- a/drivers/gpio/gpiolib.c |
| 47 | +++ b/drivers/gpio/gpiolib.c |
| 48 | @@ -1727,11 +1727,6 @@ static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc) |
| 49 | */ |
| 50 | int gpiochip_generic_request(struct gpio_chip *gc, unsigned offset) |
| 51 | { |
| 52 | -#ifdef CONFIG_PINCTRL |
| 53 | - if (list_empty(&gc->gpiodev->pin_ranges)) |
| 54 | - return 0; |
| 55 | -#endif |
| 56 | - |
| 57 | return pinctrl_gpio_request(gc->gpiodev->base + offset); |
| 58 | } |
| 59 | EXPORT_SYMBOL_GPL(gpiochip_generic_request); |
| 60 | diff --git a/drivers/hwmon/pmbus/pmbus.h b/drivers/hwmon/pmbus/pmbus.h |
| 61 | index 18e06fc6c53f..5c0f429ed7ad 100644 |
| 62 | --- a/drivers/hwmon/pmbus/pmbus.h |
| 63 | +++ b/drivers/hwmon/pmbus/pmbus.h |
| 64 | @@ -361,7 +361,7 @@ enum pmbus_sensor_classes { |
| 65 | PSC_NUM_CLASSES /* Number of power sensor classes */ |
| 66 | }; |
| 67 | |
| 68 | -#define PMBUS_PAGES 32 /* Per PMBus specification */ |
| 69 | +#define PMBUS_PAGES 255 /* Per PMBus specification */ |
| 70 | #define PMBUS_PHASES 8 /* Maximum number of phases per page */ |
| 71 | |
| 72 | /* Functionality bit mask */ |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 73 | diff --git a/drivers/leds/leds-tlc591xx.c b/drivers/leds/leds-tlc591xx.c |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 74 | index 0929f1275814..710c56cba818 100644 |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 75 | --- a/drivers/leds/leds-tlc591xx.c |
| 76 | +++ b/drivers/leds/leds-tlc591xx.c |
Jan Kundrát | f97c81d | 2020-02-06 00:33:19 +0100 | [diff] [blame] | 77 | @@ -40,6 +40,9 @@ |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 78 | |
| 79 | #define ldev_to_led(c) container_of(c, struct tlc591xx_led, ldev) |
| 80 | |
| 81 | +#define TLC591XX_RESET_BYTE_0 0xa5 |
| 82 | +#define TLC591XX_RESET_BYTE_1 0x5a |
| 83 | + |
| 84 | struct tlc591xx_led { |
| 85 | bool active; |
| 86 | unsigned int led_no; |
Jan Kundrát | f97c81d | 2020-02-06 00:33:19 +0100 | [diff] [blame] | 87 | @@ -51,21 +54,25 @@ struct tlc591xx_priv { |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 88 | struct tlc591xx_led leds[TLC591XX_MAX_LEDS]; |
| 89 | struct regmap *regmap; |
| 90 | unsigned int reg_ledout_offset; |
| 91 | + struct i2c_client *swrst_client; |
| 92 | }; |
| 93 | |
| 94 | struct tlc591xx { |
| 95 | unsigned int max_leds; |
| 96 | unsigned int reg_ledout_offset; |
| 97 | + u8 swrst_addr; |
| 98 | }; |
| 99 | |
| 100 | static const struct tlc591xx tlc59116 = { |
| 101 | .max_leds = 16, |
| 102 | .reg_ledout_offset = 0x14, |
| 103 | + .swrst_addr = 0x6b, |
| 104 | }; |
| 105 | |
| 106 | static const struct tlc591xx tlc59108 = { |
| 107 | .max_leds = 8, |
| 108 | .reg_ledout_offset = 0x0c, |
| 109 | + .swrst_addr = 0x4b, |
| 110 | }; |
| 111 | |
| 112 | static int |
Jan Kundrát | 31bf7ae | 2020-02-14 17:03:53 +0100 | [diff] [blame] | 113 | @@ -181,6 +188,18 @@ tlc591xx_probe(struct i2c_client *client, |
| 114 | |
| 115 | i2c_set_clientdata(client, priv); |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 116 | |
Jan Kundrát | f97c81d | 2020-02-06 00:33:19 +0100 | [diff] [blame] | 117 | + priv->swrst_client = devm_i2c_new_dummy_device(dev, client->adapter, tlc591xx->swrst_addr); |
Jan Kundrát | 89b682a | 2020-03-08 13:03:33 -0700 | [diff] [blame] | 118 | + if (IS_ERR(priv->swrst_client)) { |
| 119 | + dev_info(dev, "Skipping reset: address %02x already used\n", |
| 120 | + tlc591xx->swrst_addr); |
| 121 | + } else { |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 122 | + err = i2c_smbus_write_byte_data(priv->swrst_client, |
| 123 | + TLC591XX_RESET_BYTE_0, TLC591XX_RESET_BYTE_1); |
| 124 | + if (err) { |
| 125 | + dev_warn(dev, "SW reset failed\n"); |
| 126 | + } |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 127 | + } |
| 128 | + |
Jan Kundrát | 31bf7ae | 2020-02-14 17:03:53 +0100 | [diff] [blame] | 129 | err = tlc591xx_set_mode(priv->regmap, MODE2_DIM); |
| 130 | if (err < 0) |
| 131 | return err; |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 132 | diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c |
| 133 | index c39978b750ec..653c0b3d2912 100644 |
| 134 | --- a/drivers/pci/controller/pci-mvebu.c |
| 135 | +++ b/drivers/pci/controller/pci-mvebu.c |
| 136 | @@ -960,25 +960,16 @@ static void mvebu_pcie_powerdown(struct mvebu_pcie_port *port) |
| 137 | } |
| 138 | |
| 139 | /* |
| 140 | - * We can't use devm_of_pci_get_host_bridge_resources() because we |
| 141 | - * need to parse our special DT properties encoding the MEM and IO |
| 142 | - * apertures. |
| 143 | + * devm_of_pci_get_host_bridge_resources() only sets up translateable resources, |
| 144 | + * so we need extra resource setup parsing our special DT properties encoding |
| 145 | + * the MEM and IO apertures. |
| 146 | */ |
| 147 | static int mvebu_pcie_parse_request_resources(struct mvebu_pcie *pcie) |
| 148 | { |
| 149 | struct device *dev = &pcie->pdev->dev; |
| 150 | - struct device_node *np = dev->of_node; |
| 151 | struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); |
| 152 | int ret; |
| 153 | |
| 154 | - /* Get the bus range */ |
| 155 | - ret = of_pci_parse_bus_range(np, &pcie->busn); |
| 156 | - if (ret) { |
| 157 | - dev_err(dev, "failed to parse bus-range property: %d\n", ret); |
| 158 | - return ret; |
| 159 | - } |
| 160 | - pci_add_resource(&bridge->windows, &pcie->busn); |
| 161 | - |
| 162 | /* Get the PCIe memory aperture */ |
| 163 | mvebu_mbus_get_pcie_mem_aperture(&pcie->mem); |
| 164 | if (resource_size(&pcie->mem) == 0) { |
| 165 | @@ -988,6 +979,9 @@ static int mvebu_pcie_parse_request_resources(struct mvebu_pcie *pcie) |
| 166 | |
| 167 | pcie->mem.name = "PCI MEM"; |
| 168 | pci_add_resource(&bridge->windows, &pcie->mem); |
| 169 | + ret = devm_request_resource(dev, &iomem_resource, &pcie->mem); |
| 170 | + if (ret) |
| 171 | + return ret; |
| 172 | |
| 173 | /* Get the PCIe IO aperture */ |
| 174 | mvebu_mbus_get_pcie_io_aperture(&pcie->io); |
| 175 | @@ -1001,9 +995,12 @@ static int mvebu_pcie_parse_request_resources(struct mvebu_pcie *pcie) |
| 176 | pcie->realio.name = "PCI I/O"; |
| 177 | |
| 178 | pci_add_resource(&bridge->windows, &pcie->realio); |
| 179 | + ret = devm_request_resource(dev, &ioport_resource, &pcie->realio); |
| 180 | + if (ret) |
| 181 | + return ret; |
| 182 | } |
| 183 | |
| 184 | - return devm_request_pci_bus_resources(dev, &bridge->windows); |
| 185 | + return 0; |
| 186 | } |
| 187 | |
| 188 | /* |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 189 | diff --git a/drivers/pinctrl/pinctrl-mcp23s08.c b/drivers/pinctrl/pinctrl-mcp23s08.c |
Jan Kundrát | 0e9469d | 2020-11-03 01:33:10 +0100 | [diff] [blame] | 190 | index 7edb067f5e76..ce2d8014b7e0 100644 |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 191 | --- a/drivers/pinctrl/pinctrl-mcp23s08.c |
| 192 | +++ b/drivers/pinctrl/pinctrl-mcp23s08.c |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 193 | @@ -564,7 +564,7 @@ int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, |
| 194 | |
| 195 | ret = mcp_read(mcp, MCP_IOCON, &status); |
| 196 | if (ret < 0) |
| 197 | - goto fail; |
| 198 | + return dev_err_probe(dev, ret, "can't identify chip %d\n", addr); |
| 199 | |
| 200 | mcp->irq_controller = |
| 201 | device_property_read_bool(dev, "interrupt-controller"); |
| 202 | @@ -598,7 +598,7 @@ int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, |
| 203 | |
| 204 | ret = mcp_write(mcp, MCP_IOCON, status); |
| 205 | if (ret < 0) |
| 206 | - goto fail; |
| 207 | + return dev_err_probe(dev, ret, "can't write IOCON %d\n", addr); |
| 208 | } |
| 209 | |
| 210 | if (mcp->irq && mcp->irq_controller) { |
| 211 | @@ -616,7 +616,7 @@ int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, |
| 212 | |
| 213 | ret = devm_gpiochip_add_data(dev, &mcp->chip, mcp); |
| 214 | if (ret < 0) |
| 215 | - goto fail; |
| 216 | + return dev_err_probe(dev, ret, "can't add GPIO chip\n"); |
| 217 | |
| 218 | mcp->pinctrl_desc.pctlops = &mcp_pinctrl_ops; |
| 219 | mcp->pinctrl_desc.confops = &mcp_pinconf_ops; |
| 220 | @@ -628,18 +628,17 @@ int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev, |
| 221 | mcp->pinctrl_desc.owner = THIS_MODULE; |
| 222 | |
| 223 | mcp->pctldev = devm_pinctrl_register(dev, &mcp->pinctrl_desc, mcp); |
| 224 | - if (IS_ERR(mcp->pctldev)) { |
| 225 | - ret = PTR_ERR(mcp->pctldev); |
| 226 | - goto fail; |
| 227 | - } |
| 228 | + if (IS_ERR(mcp->pctldev)) |
| 229 | + return dev_err_probe(dev, PTR_ERR(mcp->pctldev), "can't register controller\n"); |
| 230 | |
| 231 | - if (mcp->irq) |
| 232 | + if (mcp->irq) { |
| 233 | ret = mcp23s08_irq_setup(mcp); |
| 234 | + if (ret) |
| 235 | + return dev_err_probe(dev, ret, "can't setup IRQ\n"); |
| 236 | + } |
| 237 | |
| 238 | -fail: |
| 239 | - if (ret < 0) |
| 240 | - dev_dbg(dev, "can't setup chip %d, --> %d\n", addr, ret); |
| 241 | - return ret; |
| 242 | + return 0; |
| 243 | } |
| 244 | EXPORT_SYMBOL_GPL(mcp23s08_probe_one); |
| 245 | + |
| 246 | MODULE_LICENSE("GPL"); |
| 247 | diff --git a/drivers/pinctrl/pinctrl-mcp23s08_spi.c b/drivers/pinctrl/pinctrl-mcp23s08_spi.c |
| 248 | index 1f47a661b0a7..3271e304c985 100644 |
| 249 | --- a/drivers/pinctrl/pinctrl-mcp23s08_spi.c |
| 250 | +++ b/drivers/pinctrl/pinctrl-mcp23s08_spi.c |
| 251 | @@ -119,13 +119,15 @@ static int mcp23s08_spi_regmap_init(struct mcp23s08 *mcp, struct device *dev, |
| 252 | return -EINVAL; |
| 253 | } |
| 254 | |
| 255 | - copy = devm_kmemdup(dev, &config, sizeof(config), GFP_KERNEL); |
| 256 | + copy = devm_kmemdup(dev, config, sizeof(*config), GFP_KERNEL); |
| 257 | if (!copy) |
| 258 | return -ENOMEM; |
| 259 | |
| 260 | copy->name = name; |
| 261 | |
| 262 | mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp, copy); |
| 263 | + if (IS_ERR(mcp->regmap)) |
| 264 | + dev_err(dev, "regmap init failed for %s\n", mcp->chip.label); |
| 265 | return PTR_ERR_OR_ZERO(mcp->regmap); |
| 266 | } |
| 267 | |
| 268 | @@ -141,6 +143,7 @@ static int mcp23s08_probe(struct spi_device *spi) |
| 269 | int type; |
| 270 | int ret; |
| 271 | u32 v; |
| 272 | + struct device_node *np; |
| 273 | |
| 274 | match = device_get_match_data(dev); |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 275 | if (match) |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 276 | @@ -190,6 +193,16 @@ static int mcp23s08_probe(struct spi_device *spi) |
| 277 | return ret; |
| 278 | |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 279 | ngpio += data->mcp[addr]->chip.ngpio; |
| 280 | + |
| 281 | + for_each_available_child_of_node(spi->dev.of_node, np) { |
| 282 | + u32 chip_addr; |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 283 | + ret = of_property_read_u32(np, "address", &chip_addr); |
| 284 | + if (ret) |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 285 | + continue; |
| 286 | + if (chip_addr != addr) |
| 287 | + continue; |
| 288 | + devprop_gpiochip_set_names(&data->mcp[addr]->chip, of_fwnode_handle(np)); |
| 289 | + } |
| 290 | } |
| 291 | data->ngpio = ngpio; |
| 292 | |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 293 | diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 294 | index b57b8b3cc26e..5dc323643522 100644 |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 295 | --- a/drivers/spi/spi-orion.c |
| 296 | +++ b/drivers/spi/spi-orion.c |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 297 | @@ -17,8 +17,10 @@ |
| 298 | #include <linux/of.h> |
| 299 | #include <linux/of_address.h> |
| 300 | #include <linux/of_device.h> |
| 301 | +#include <linux/of_gpio.h> |
| 302 | #include <linux/clk.h> |
| 303 | #include <linux/sizes.h> |
| 304 | +#include <linux/gpio.h> |
| 305 | #include <asm/unaligned.h> |
| 306 | |
| 307 | #define DRIVER_NAME "orion_spi" |
| 308 | @@ -86,18 +88,15 @@ struct orion_direct_acc { |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 309 | u32 size; |
| 310 | }; |
| 311 | |
| 312 | -struct orion_child_options { |
| 313 | - struct orion_direct_acc direct_access; |
| 314 | -}; |
| 315 | - |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 316 | struct orion_spi { |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 317 | struct spi_master *master; |
| 318 | void __iomem *base; |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 319 | struct clk *clk; |
| 320 | struct clk *axi_clk; |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 321 | const struct orion_spi_dev *devdata; |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 322 | + int unused_hw_gpio; |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 323 | |
| 324 | - struct orion_child_options child[ORION_NUM_CHIPSELECTS]; |
| 325 | + struct orion_direct_acc direct_access[ORION_NUM_CHIPSELECTS]; |
| 326 | }; |
| 327 | |
| 328 | static inline void __iomem *spi_reg(struct orion_spi *orion_spi, u32 reg) |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 329 | @@ -322,27 +321,20 @@ orion_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) |
| 330 | static void orion_spi_set_cs(struct spi_device *spi, bool enable) |
| 331 | { |
| 332 | struct orion_spi *orion_spi; |
| 333 | + int cs; |
| 334 | |
| 335 | orion_spi = spi_master_get_devdata(spi->master); |
| 336 | |
| 337 | - /* |
| 338 | - * If this line is using a GPIO to control chip select, this internal |
| 339 | - * .set_cs() function will still be called, so we clear any previous |
| 340 | - * chip select. The CS we activate will not have any elecrical effect, |
| 341 | - * as it is handled by a GPIO, but that doesn't matter. What we need |
| 342 | - * is to deassert the old chip select and assert some other chip select. |
| 343 | - */ |
| 344 | + if (gpio_is_valid(spi->cs_gpio)) |
| 345 | + cs = orion_spi->unused_hw_gpio; |
| 346 | + else |
| 347 | + cs = spi->chip_select; |
| 348 | + |
| 349 | orion_spi_clrbits(orion_spi, ORION_SPI_IF_CTRL_REG, ORION_SPI_CS_MASK); |
| 350 | orion_spi_setbits(orion_spi, ORION_SPI_IF_CTRL_REG, |
| 351 | - ORION_SPI_CS(spi->chip_select)); |
| 352 | + ORION_SPI_CS(cs)); |
| 353 | |
| 354 | - /* |
| 355 | - * Chip select logic is inverted from spi_set_cs(). For lines using a |
| 356 | - * GPIO to do chip select SPI_CS_HIGH is enforced and inversion happens |
| 357 | - * in the GPIO library, but we don't care about that, because in those |
| 358 | - * cases we are dealing with an unused native CS anyways so the polarity |
| 359 | - * doesn't matter. |
| 360 | - */ |
| 361 | + /* Chip select logic is inverted from spi_set_cs */ |
| 362 | if (!enable) |
| 363 | orion_spi_setbits(orion_spi, ORION_SPI_IF_CTRL_REG, 0x1); |
| 364 | else |
| 365 | @@ -434,7 +426,7 @@ orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer) |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 366 | int cs = spi->chip_select; |
Jan Kundrát | 549db87 | 2019-03-05 12:23:25 +0100 | [diff] [blame] | 367 | void __iomem *vaddr; |
Jan Kundrát | 2501643 | 2019-03-04 21:40:58 +0100 | [diff] [blame] | 368 | |
| 369 | - word_len = spi->bits_per_word; |
| 370 | + word_len = xfer->bits_per_word; |
| 371 | count = xfer->len; |
| 372 | |
| 373 | orion_spi = spi_master_get_devdata(spi->master); |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 374 | @@ -443,7 +435,7 @@ orion_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer) |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 375 | * Use SPI direct write mode if base address is available. Otherwise |
| 376 | * fall back to PIO mode for this transfer. |
| 377 | */ |
| 378 | - vaddr = orion_spi->child[cs].direct_access.vaddr; |
| 379 | + vaddr = orion_spi->direct_access[cs].vaddr; |
| 380 | |
| 381 | if (vaddr && xfer->tx_buf && word_len == 8) { |
| 382 | unsigned int cnt = count / 4; |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 383 | @@ -507,6 +499,9 @@ static int orion_spi_transfer_one(struct spi_master *master, |
| 384 | |
| 385 | static int orion_spi_setup(struct spi_device *spi) |
| 386 | { |
| 387 | + if (gpio_is_valid(spi->cs_gpio)) { |
| 388 | + gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH)); |
| 389 | + } |
| 390 | return orion_spi_setup_transfer(spi, NULL); |
| 391 | } |
| 392 | |
| 393 | @@ -623,13 +618,13 @@ static int orion_spi_probe(struct platform_device *pdev) |
| 394 | master->setup = orion_spi_setup; |
| 395 | master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); |
| 396 | master->auto_runtime_pm = true; |
| 397 | - master->use_gpio_descriptors = true; |
| 398 | master->flags = SPI_MASTER_GPIO_SS; |
| 399 | |
| 400 | platform_set_drvdata(pdev, master); |
| 401 | |
| 402 | spi = spi_master_get_devdata(master); |
| 403 | spi->master = master; |
| 404 | + spi->unused_hw_gpio = -1; |
| 405 | |
| 406 | of_id = of_match_device(orion_spi_of_match_table, &pdev->dev); |
| 407 | devdata = (of_id) ? of_id->data : &orion_spi_dev_data; |
| 408 | @@ -682,8 +677,8 @@ static int orion_spi_probe(struct platform_device *pdev) |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 409 | } |
| 410 | |
| 411 | for_each_available_child_of_node(pdev->dev.of_node, np) { |
| 412 | - struct orion_direct_acc *dir_acc; |
| 413 | u32 cs; |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 414 | + int cs_gpio; |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 415 | |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 416 | /* Get chip-select number from the "reg" property */ |
| 417 | status = of_property_read_u32(np, "reg", &cs); |
| 418 | @@ -694,6 +689,44 @@ static int orion_spi_probe(struct platform_device *pdev) |
| 419 | continue; |
| 420 | } |
| 421 | |
| 422 | + /* |
| 423 | + * Initialize the CS GPIO: |
| 424 | + * - properly request the actual GPIO signal |
| 425 | + * - de-assert the logical signal so that all GPIO CS lines |
| 426 | + * are inactive when probing for slaves |
| 427 | + * - find an unused physical CS which will be driven for any |
| 428 | + * slave which uses a CS GPIO |
| 429 | + */ |
| 430 | + cs_gpio = of_get_named_gpio(pdev->dev.of_node, "cs-gpios", cs); |
| 431 | + if (cs_gpio > 0) { |
| 432 | + char *gpio_name; |
| 433 | + int cs_flags; |
| 434 | + |
| 435 | + if (spi->unused_hw_gpio == -1) { |
| 436 | + dev_info(&pdev->dev, |
| 437 | + "Selected unused HW CS#%d for any GPIO CSes\n", |
| 438 | + cs); |
| 439 | + spi->unused_hw_gpio = cs; |
| 440 | + } |
| 441 | + |
| 442 | + gpio_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, |
| 443 | + "%s-CS%d", dev_name(&pdev->dev), cs); |
| 444 | + if (!gpio_name) { |
| 445 | + status = -ENOMEM; |
| 446 | + goto out_rel_axi_clk; |
| 447 | + } |
| 448 | + |
| 449 | + cs_flags = of_property_read_bool(np, "spi-cs-high") ? |
| 450 | + GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH; |
| 451 | + status = devm_gpio_request_one(&pdev->dev, cs_gpio, |
| 452 | + cs_flags, gpio_name); |
| 453 | + if (status) { |
| 454 | + dev_err(&pdev->dev, |
| 455 | + "Can't request GPIO for CS %d\n", cs); |
| 456 | + goto out_rel_axi_clk; |
| 457 | + } |
| 458 | + } |
| 459 | + |
| 460 | /* |
| 461 | * Check if an address is configured for this SPI device. If |
| 462 | * not, the MBus mapping via the 'ranges' property in the 'soc' |
| 463 | @@ -711,13 +744,14 @@ static int orion_spi_probe(struct platform_device *pdev) |
| 464 | * This needs to get extended for the direct SPI NOR / SPI NAND |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 465 | * support, once this gets implemented. |
| 466 | */ |
| 467 | - dir_acc = &spi->child[cs].direct_access; |
| 468 | - dir_acc->vaddr = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE); |
| 469 | - if (!dir_acc->vaddr) { |
| 470 | + spi->direct_access[cs].vaddr = devm_ioremap(&pdev->dev, |
| 471 | + r->start, |
| 472 | + PAGE_SIZE); |
| 473 | + if (!spi->direct_access[cs].vaddr) { |
| 474 | status = -ENOMEM; |
| 475 | goto out_rel_axi_clk; |
| 476 | } |
| 477 | - dir_acc->size = PAGE_SIZE; |
| 478 | + spi->direct_access[cs].size = PAGE_SIZE; |
| 479 | |
| 480 | dev_info(&pdev->dev, "CS%d configured for direct access\n", cs); |
| 481 | } |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 482 | diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 483 | index 8434bd5a8ec7..7db66392fcd5 100644 |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 484 | --- a/drivers/tty/serial/max310x.c |
| 485 | +++ b/drivers/tty/serial/max310x.c |
Jan Kundrát | 2bfe9ee | 2019-12-04 13:42:07 +0100 | [diff] [blame] | 486 | @@ -235,6 +235,10 @@ |
| 487 | #define MAX310x_REV_MASK (0xf8) |
| 488 | #define MAX310X_WRITE_BIT 0x80 |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 489 | |
Jan Kundrát | 2bfe9ee | 2019-12-04 13:42:07 +0100 | [diff] [blame] | 490 | +/* Timeout for external crystal stability */ |
| 491 | +#define MAX310X_XTAL_WAIT_RETRIES 20 |
| 492 | +#define MAX310X_XTAL_WAIT_DELAY_MS 10 |
| 493 | + |
| 494 | /* MAX3107 specific */ |
| 495 | #define MAX3107_REV_ID (0xa0) |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 496 | |
Jan Kundrát | 2bfe9ee | 2019-12-04 13:42:07 +0100 | [diff] [blame] | 497 | @@ -610,11 +614,14 @@ static int max310x_set_ref_clk(struct device *dev, struct max310x_port *s, |
| 498 | |
| 499 | /* Wait for crystal */ |
| 500 | if (xtal) { |
| 501 | - unsigned int val; |
| 502 | - msleep(10); |
| 503 | - regmap_read(s->regmap, MAX310X_STS_IRQSTS_REG, &val); |
| 504 | + unsigned int val = 0, i; |
| 505 | + for (i = 0; i < MAX310X_XTAL_WAIT_RETRIES && !(val & MAX310X_STS_CLKREADY_BIT); ++i) { |
| 506 | + msleep(MAX310X_XTAL_WAIT_DELAY_MS); |
| 507 | + regmap_read(s->regmap, MAX310X_STS_IRQSTS_REG, &val); |
| 508 | + } |
| 509 | if (!(val & MAX310X_STS_CLKREADY_BIT)) { |
| 510 | - dev_warn(dev, "clock is not stable yet\n"); |
| 511 | + dev_err(dev, "clock is not stable\n"); |
| 512 | + return -EAGAIN; |
| 513 | } |
| 514 | } |
| 515 | |
Jan Kundrát | 0341eea | 2020-10-16 18:06:38 +0200 | [diff] [blame] | 516 | @@ -1056,9 +1063,9 @@ static int max310x_startup(struct uart_port *port) |
| 517 | max310x_port_update(port, MAX310X_MODE1_REG, |
| 518 | MAX310X_MODE1_TRNSCVCTRL_BIT, 0); |
| 519 | |
| 520 | - /* Configure MODE2 register & Reset FIFOs*/ |
| 521 | - val = MAX310X_MODE2_RXEMPTINV_BIT | MAX310X_MODE2_FIFORST_BIT; |
| 522 | - max310x_port_write(port, MAX310X_MODE2_REG, val); |
| 523 | + /* Reset FIFOs */ |
| 524 | + max310x_port_write(port, MAX310X_MODE2_REG, |
| 525 | + MAX310X_MODE2_FIFORST_BIT); |
| 526 | max310x_port_update(port, MAX310X_MODE2_REG, |
| 527 | MAX310X_MODE2_FIFORST_BIT, 0); |
| 528 | |
| 529 | @@ -1086,8 +1093,27 @@ static int max310x_startup(struct uart_port *port) |
| 530 | /* Clear IRQ status register */ |
| 531 | max310x_port_read(port, MAX310X_IRQSTS_REG); |
| 532 | |
| 533 | - /* Enable RX, TX, CTS change interrupts */ |
| 534 | - val = MAX310X_IRQ_RXEMPTY_BIT | MAX310X_IRQ_TXEMPTY_BIT; |
| 535 | + /* |
| 536 | + * Let's ask for an interrupt after a timeout equivalent to |
| 537 | + * the receiving time of 4 characters after the last character |
| 538 | + * has been received. |
| 539 | + */ |
| 540 | + max310x_port_write(port, MAX310X_RXTO_REG, 4); |
| 541 | + |
| 542 | + /* |
| 543 | + * Make sure we also get RX interrupts when the RX FIFO is |
| 544 | + * filling up quickly, so get an interrupt when half of the RX |
| 545 | + * FIFO has been filled in. |
| 546 | + */ |
| 547 | + max310x_port_write(port, MAX310X_FIFOTRIGLVL_REG, |
| 548 | + MAX310X_FIFOTRIGLVL_RX(MAX310X_FIFO_SIZE / 2)); |
| 549 | + |
| 550 | + /* Enable RX timeout interrupt in LSR */ |
| 551 | + max310x_port_write(port, MAX310X_LSR_IRQEN_REG, |
| 552 | + MAX310X_LSR_RXTO_BIT); |
| 553 | + |
| 554 | + /* Enable LSR, RX FIFO trigger, CTS change interrupts */ |
| 555 | + val = MAX310X_IRQ_LSR_BIT | MAX310X_IRQ_RXFIFO_BIT | MAX310X_IRQ_TXEMPTY_BIT; |
| 556 | max310x_port_write(port, MAX310X_IRQEN_REG, val | MAX310X_IRQ_CTS_BIT); |
| 557 | |
| 558 | return 0; |
| 559 | @@ -1327,6 +1353,10 @@ static int max310x_probe(struct device *dev, struct max310x_devtype *devtype, |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 560 | } |
| 561 | |
| 562 | uartclk = max310x_set_ref_clk(dev, s, freq, xtal); |
Jan Kundrát | 2bfe9ee | 2019-12-04 13:42:07 +0100 | [diff] [blame] | 563 | + if (uartclk < 0) { |
| 564 | + ret = uartclk; |
| 565 | + goto out_uart; |
| 566 | + } |
| 567 | dev_dbg(dev, "Reference clock set to %i Hz\n", uartclk); |
Jan Kundrát | e7d2162 | 2019-03-28 22:52:38 +0100 | [diff] [blame] | 568 | |
Jan Kundrát | 2bfe9ee | 2019-12-04 13:42:07 +0100 | [diff] [blame] | 569 | for (i = 0; i < devtype->nr; i++) { |