| #include "armada-388-clearfog-base.dts" |
| |
| &w25q32 { |
| status = "okay"; |
| /* The chip itself is rated up to 50MHz for regular reads, 60MHz for |
| * all other transactions, but somehow the mere presence of the |
| * MAX14830 EV board breaks these transfers. Changing the speed all the |
| * way down to 100kHz doesn't help. */ |
| }; |
| |
| / { |
| clocks { |
| spi_uart_clk: osc_max14830 { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <3686400>; |
| }; |
| }; |
| |
| soc { |
| ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 |
| MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 |
| MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 |
| MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 |
| MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000 |
| /* all above is from the upstream DTS */ |
| |
| /* maybe-default mappings for SPI1 CS0 from the datasheet */ |
| MBUS_ID(0x01, 0x1a) 0 0xd4000000 0x4000000 |
| /* SPI1 CS1 */ |
| MBUS_ID(0x01, 0x5a) 0 0xd8000000 0x4000000 |
| /* SPI1 CS2 */ |
| MBUS_ID(0x01, 0x9a) 0 0xd0000000 0x4000000 |
| >; |
| |
| internal-regs { |
| sdhci@d8000 { |
| /delete-property/ cd-gpios; |
| broken-cd; |
| }; |
| }; |
| }; |
| |
| gpio_i2c { |
| compatible = "i2c-gpio"; |
| sda-gpios = <&gpio0 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
| scl-gpios = <&gpio0 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |
| i2c-gpio.delay-us = <1>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| }; |
| }; |
| |
| &uart1_pins { |
| status = "disabled"; |
| }; |
| |
| &uart1 { |
| status = "disabled"; |
| }; |
| |
| &gpio1 { |
| mikrobus_pwm { |
| /* MPP54: this needs an external pull-up */ |
| gpio-hog; |
| gpios = <22 GPIO_ACTIVE_HIGH>; |
| input; |
| line-name = "MAX14830-int"; |
| }; |
| }; |
| |
| &spi1 { |
| reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x50> /* control */ |
| , <MBUS_ID(0x01, 0x1a) 0 0xffffffff> /* CS0 */ |
| , <MBUS_ID(0x01, 0x5a) 0 0xffffffff> /* CS1 */ |
| , <MBUS_ID(0x01, 0x9a) 0 0xffffffff> /* CS2 */ |
| , <MBUS_ID(0x01, 0xda) 0 0xffffffff> /* CS3 */ |
| ; |
| |
| max14830: max14830@2 { |
| compatible = "maxim,max14830"; |
| reg = <2>; |
| clocks = <&spi_uart_clk>; |
| clock-names = "xtal"; |
| interrupt-parent = <&gpio1>; |
| interrupts = <22 IRQ_TYPE_LEVEL_LOW>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| spi-max-frequency = <26000000>; |
| }; |
| }; |