clearfog: Add a SW bit-bang I2C bus for PMBus
Unfortunately, we do not have a standalone I2C bus on this board; the
I2C0 is not present on any accessible pins (and cannot be easily muxed),
and I2C1 goes directly to the SFP slot which uses 0x50/0x51 addresses
that conflicts with out PSUs.
Because PMBus might want to use hard-coded addresses every now and then,
even solutions with some ad-hoc address translators such as LTC4316
might not fully help (think ARA or PEC). Let's use a software bitbang to
add another I2C bus.
What remains is a choice of proper GPIO pins. We could use some which
belong to MAX14830, I've tested it and it's fast enough to run at
20kHz. When we reuse the SoC's own GPIO pins, though, the effective SCL
frequency is about 67kHz.
I tried timing the following operations:
1) `time echo pmbus 0x25 > /sys/bus/i2c/devices/i2c-2/new_device` for
device initialization,
2) `time cat /sys/class/hwmon/hwmon4/*_input > /dev/null` for reading
all values the first time,
3) the same command as 2), but after a few seconds to re-read this
stuff.
The results are as follows:
| | device init | first read | second read |
|---------------|-------------|------------|-------------|
| native I2C | 1.39s | 0.48s | 0.28s |
| SoC GPIO | 1.82s | 0.65s | 0.35s |
| MAX14830 GPIO | 5.12s | 1.96s | 1.10s |
Given that we have "enough UARTs", let's reuse ua1's pins for SW I2C.
Change-Id: I1ea5eb421d6029ec5b5e544b94207922bae65222
diff --git a/board/czechlight/clearfog/czechlight-clearfog.dts b/board/czechlight/clearfog/czechlight-clearfog.dts
index e690045..983773c 100644
--- a/board/czechlight/clearfog/czechlight-clearfog.dts
+++ b/board/czechlight/clearfog/czechlight-clearfog.dts
@@ -40,6 +40,23 @@
};
};
};
+
+ gpio_i2c {
+ compatible = "i2c-gpio";
+ sda-gpios = <&gpio0 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio0 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ i2c-gpio.delay-us = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+};
+
+&uart1_pins {
+ status = "disabled";
+};
+
+&uart1 {
+ status = "disabled";
};
&gpio1 {
diff --git a/board/czechlight/clearfog/linux.fragment b/board/czechlight/clearfog/linux.fragment
index b2db091..724d3c5 100644
--- a/board/czechlight/clearfog/linux.fragment
+++ b/board/czechlight/clearfog/linux.fragment
@@ -14,3 +14,6 @@
# SPI-to-Quad-UART
CONFIG_SERIAL_MAX310X=y
+
+# Extra I2C bus for the PSUs
+CONFIG_I2C_GPIO=y