blob: c791104525b2a7318890126d316039309aa799ce [file] [log] [blame]
#include "armada-388-clearfog-base.dts"
&w25q32 {
status = "okay";
/* The chip itself is rated up to 50MHz for regular reads, 60MHz for
* all other transactions, but somehow the mere presence of the
* MAX14830 EV board breaks these transfers. Changing the speed all the
* way down to 100kHz doesn't help. */
};
/ {
clocks {
spi_uart_clk: osc_max14830 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <3686400>;
};
};
soc {
internal-regs {
sdhci@d8000 {
/delete-property/ cd-gpios;
broken-cd;
};
};
};
gpio_i2c {
compatible = "i2c-gpio";
sda-gpios = <&gpio0 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio0 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio.delay-us = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
};
&uart1_pins {
status = "disabled";
};
&uart1 {
status = "disabled";
};
&gpio1 {
spi_int {
/* MPP54: this needs an external pull-up */
gpio-hog;
gpios = <22 GPIO_ACTIVE_HIGH>;
input;
line-name = "SPI-INT";
};
};
&spi1 {
cs-gpios = <0>, <&gpio0 22 GPIO_ACTIVE_HIGH>, <0>;
max14830: max14830@2 {
compatible = "maxim,max14830";
reg = <2>;
clocks = <&spi_uart_clk>;
clock-names = "xtal";
interrupt-parent = <&gpio1>;
interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
gpio-controller;
#gpio-cells = <2>;
spi-max-frequency = <26000000>;
};
gpio_spi_chips: gpio@1 {
compatible = "microchip,mcp23s17";
reg = <1>;
interrupt-parent = <&gpio1>;
interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
microchip,spi-present-mask = <0x06>; /* extra addresses 1 and 2 */
microchip,irq-mirror;
microchip,irq-open-drain;
spi-max-frequency = <10000000>;
};
};