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f0600af212301ec121ba6a4afc0a91b6b21a354e
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arch
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arm
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mach-zynq
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slcr.c
0107f24
ARM: zynq: move SoC sources to mach-zynq
by Masahiro Yamada
· 10 years ago
[Renamed from arch/arm/cpu/armv7/zynq/slcr.c]
f25f552
zynq: slcr: Disable all level shifters
by Siva Durga Prasad Paladugu
· 10 years ago
f60c6fb
ARM: zynq: slcr: Dont modify the reserved bits
by Siva Durga Prasad Paladugu
· 10 years ago
eb8c54b
ARM: zynq: ehci: Added USB host driver support
by Michal Simek
· 11 years ago
3cc3fa8
ARM: zynq: Add MIO detection code
by Michal Simek
· 11 years ago
2da7a74
ARM: zynq: Setup correct slcr_lock value
by Michal Simek
· 11 years ago
6e04769
ARM: zynq: slcr: Fix incorrect commentary
by Michal Simek
· 11 years ago
3b5b599
ARM: zynq: Fix sparse warnings in slcr.c
by Michal Simek
· 11 years ago
97598fc
net: zynq_gem: Calculate clock dividers dynamically
by Soren Brinkmann
· 11 years ago
1cd46ed
net: zynq_gem: Move RCLK details out of driver
by Soren Brinkmann
· 11 years ago
b3de924
zynq: Add support to find bootmode
by Jagannadha Sutradharudu Teki
· 11 years ago
39523be
zynq: slcr: Wait 100ms till clk is properly setup
by Michal Simek
· 11 years ago
1a45966
Add GPL-2.0+ SPDX-License-Identifier to source files
by Wolfgang Denk
· 11 years ago
d5dae85
fpga: zynq: Add support for loading bitstream
by Michal Simek
· 12 years ago
8024352
net: gem: Fix gem driver on 1Gbps LAN
by Michal Simek
· 12 years ago
59c651f
arm: zynq: Add SLCR support with system reset
by Michal Simek
· 12 years ago