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gerrit.cesnet.cz / github / trini / u-boot / ced6466ed520749ea73651b45fabeb5a3efa9c8b / include / asm-ppc / fsl_ddr_sdram.h
  1. c360cea fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · 16 years ago
  2. e1be0d2 32bit BUg fix for DDR2 on 8572 by Poonam_Aggrwal-b10812 · 16 years ago
  3. 22cca7e fsl-ddr: make the self refresh idle threshold configurable by Dave Liu · 16 years ago
  4. 22ff3d0 fsl-ddr: clean up the ddr code for DDR3 controller by Dave Liu · 16 years ago
  5. dbbbb3a Make DDR interleaving mode work correctly by Haiying Wang · 16 years ago
  6. 58e5e9a FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago