1. c360cea fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · 16 years ago
  2. dfb4910 Pass dimm parameters to populate populate controller options by Haiying Wang · 16 years ago[Renamed from cpu/mpc8xxx/ddr/ddr1_2_dimm_params.h]
  3. 58e5e9a FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago