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github
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trini
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u-boot
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9c90a2c8e87414007a016b7cd099ac1e32fd301b
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cpu
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mpc8xxx
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ddr
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main.c
e7563af
fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT
by Kumar Gala
· 15 years ago
edf0e25
fsl-ddr: Allow system to boot if we have more than 4G of memory
by Kumar Gala
· 16 years ago
7008d26
fsl ddr skip interleaving if not supported.
by Ed Swarthout
· 16 years ago
c9ffd83
Check DDR interleaving mode
by Haiying Wang
· 16 years ago
dfb4910
Pass dimm parameters to populate populate controller options
by Haiying Wang
· 16 years ago
dbbbb3a
Make DDR interleaving mode work correctly
by Haiying Wang
· 16 years ago
f12e454
Coding style cleanup, update CHANGELOG
by Wolfgang Denk
· 16 years ago
58e5e9a
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
by Kumar Gala
· 16 years ago