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gerrit.cesnet.cz / github / trini / u-boot / 843125daebd72a93766b8984be8bb1aa269d53e6 / arch / mips / include / asm / mipsregs.h
  1. fa476f7 mips32: detect L1 cache sizes if they're not defined by Paul Burton · 11 years ago
  2. 819833a Move architecture-specific includes to arch/$ARCH/include/asm by Peter Tyser · 15 years ago[Renamed from include/asm-mips/mipsregs.h]
  3. e2ad842 [MIPS] <asm/mipsregs.h>: Update coprocessor register access macros by Shinya Kuribayashi · 16 years ago
  4. 1a3adac [MIPS] <asm/mipsregs.h>: Update register / bit field definitions by Shinya Kuribayashi · 16 years ago
  5. bf462ae [MIPS] <asm/mipsregs.h>: CodinygStyle cleanups by Shinya Kuribayashi · 16 years ago
  6. 53677ef Big white-space cleanup. by Wolfgang Denk · 17 years ago
  7. 5da627a * Patch by Steven Scholz, 10 Oct 2003 - Add support for Altera FPGA ACEX1K by wdenk · 21 years ago LABEL_2003_10_09_2320
  8. 8bde7f7 * Code cleanup: by wdenk · 21 years ago LABEL_2003_06_27_2340
  9. 6069ff2 * Add support for 16 MB flash configuration of TRAB board by wdenk · 22 years ago LABEL_2003_02_28_0150