- 8a0d5f2 riscv: andesv5: Prefer using the generic RISC-V timer driver in S-mode by Yu Chien Peter Lin · 1 year, 2 months ago
- b68bf22 configs: andes: add vender prefix for target name by Randolph · 1 year, 2 months ago
- e637e45 riscv: enable CONFIG_DEBUG_UART by default by Heinrich Schuchardt · 1 year, 2 months ago
- 9bcf9e4 riscv: bootstage: correct bootstage_report guard by Chanho Park · 1 year, 3 months ago
- ac89738 Merge branch 'next' by Tom Rini · 1 year, 2 months ago
- 16dbe3d riscv: set fdtfile on VisionFive 2 by Heinrich Schuchardt · 1 year, 3 months ago
- 1e94b46 common: Drop linux/printk.h from common header by Simon Glass · 1 year, 2 months ago
- 5083488 Record the position of the SMBIOS tables by Simon Glass · 1 year, 2 months ago
- 90602e7 riscv: dts: starfive: generate u-boot-spl.bin.normal.out by Heinrich Schuchardt · 1 year, 2 months ago
- c5172c1 riscv: set fdtfile on VisionFive 2 by Heinrich Schuchardt · 1 year, 3 months ago
- 59d2a7d riscv: Correct event usage for riscv_cpu_probe/setup by Tom Rini · 1 year, 3 months ago
- 68f446f riscv: Rework riscv_cpu_probe for current event macros by Tom Rini · 1 year, 3 months ago
- d14222e risc-v: implement DBCN write byte by Heinrich Schuchardt · 1 year, 3 months ago
- 64339bc riscv: cpu: jh7110: Imply SPL_SYS_MALLOC_CLEAR_ON_INIT by Shengyu Qu · 1 year, 3 months ago
- 6164d86 riscv: jh7110: enable riscv,timer in the device tree by Torsten Duwe · 1 year, 3 months ago
- ddec4ca Merge tag 'v2023.10-rc4' into next by Tom Rini · 1 year, 3 months ago
- f72d0d4 event: Convert existing spy records to simple by Simon Glass · 1 year, 3 months ago
- 1c55d62 riscv: cpu: make riscv_cpu_probe to EVT_DM_POST_INIT_R callback by Chanho Park · 1 year, 3 months ago
- d768dd8 common: return type board_get_usable_ram_top by Heinrich Schuchardt · 1 year, 4 months ago
- 47ed151 riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE by Shengyu Qu · 1 year, 4 months ago
- 6419f8e riscv: Add SPL_ZERO_MEM_BEFORE_USE implementation by Shengyu Qu · 1 year, 4 months ago
- d365f66 riscv: Kconfig: Add SPL_ZERO_MEM_BEFORE_USE by Shengyu Qu · 1 year, 4 months ago
- eca2d41 riscv: starfive: Add SYS_CACHE_SHIFT_6 to enable SYS_CACHELINE_SIZE by Minda Chen · 1 year, 4 months ago
- 1037c5b riscv: dts: starfive: Enable pcie0 dts node by Minda Chen · 1 year, 4 months ago
- 6982e6b cmd/sbi: display new extensions by Heinrich Schuchardt · 1 year, 4 months ago
- 093bd03 acpi: Add missing RISC-V acpi_table header by Heinrich Schuchardt · 1 year, 4 months ago
- 8db2224 riscv: dts: starfive: Enable PCIe host controller by Mason Huo · 1 year, 4 months ago
- 6aabe22 riscv: define a cache line size for the generic CPU by Heinrich Schuchardt · 1 year, 4 months ago
- 6c4b50e riscv: dts: jh7110: Add clock source from PLL by Xingyu Wu · 1 year, 5 months ago
- 005f962 riscv: dts: jh7110: Add PLL clock controller node by Xingyu Wu · 1 year, 5 months ago
- 28ff3f1 riscv: setup per-hart stack earlier by Bo Gan · 1 year, 6 months ago
- 4416f07 riscv: dts: t-head: Add basic device tree for Sipeed Lichee PI 4A board by Yixun Lan · 1 year, 5 months ago
- 5f3a7fd riscv: t-head: licheepi4a: initial support added by Yixun Lan · 1 year, 5 months ago
- 9675d92 riscv: Rename SiFive CLINT to RISC-V ALINT by Bin Meng · 1 year, 5 months ago
- 7f1a30f riscv: clint: Update the sifive clint ipi driver to support aclint by Bin Meng · 1 year, 5 months ago
- 38d900b ram: starfive: Read memory size information from EEPROM by Yanhong Wang · 1 year, 5 months ago
- 3421a45 riscv: dts: starfive: Add support eeprom device tree node by Yanhong Wang · 1 year, 5 months ago
- aea1bd9 eeprom: starfive: Enable ID EEPROM configuration by Yanhong Wang · 1 year, 5 months ago
- 9b7060b riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B by Yanhong Wang · 1 year, 5 months ago
- 55a2b82 riscv: dts: jh7110: Add ethernet device tree nodes by Yanhong Wang · 1 year, 5 months ago
- bc35b49 riscv: andes_plicsw: Fix IPI during OpenSBI invocation by Yu Chien Peter Lin · 1 year, 5 months ago
- 4e99899 riscv: dts: sync mpfs-icicle devicetree with linux by Conor Dooley · 1 year, 5 months ago
- 5566cf2 riscv: dts: drop microchip from dts filenames by Conor Dooley · 1 year, 5 months ago
- 661e221 riscv: define test_and_{set,clear}_bit in asm/bitops.h by Ben Dooks · 1 year, 7 months ago
- 551de21 riscv: implement local_irq_{save,restore} macros by Ben Dooks · 1 year, 7 months ago
- 3c87471 riscv: add generic link for <asm/atomic.h> by Ben Dooks · 1 year, 7 months ago
- 7906155 cmd/sbi: display new extensions by Heinrich Schuchardt · 1 year, 8 months ago
- e80f407 Merge tag 'v2023.07-rc6' into next by Tom Rini · 1 year, 5 months ago
- 4a3efd7 riscv: Fix alignment of RELA sections in the linker scripts by Bin Meng · 1 year, 5 months ago
- 02d9c0b common: spl: Add spl NVMe boot support by Mayuresh Chitale · 1 year, 6 months ago WIP/2023-06-19-spl-nvme-support
- 260d496 Merge tag v2023.07-rc4 into next by Tom Rini · 1 year, 6 months ago
- f167120 include: Remove unused header files by Tom Rini · 1 year, 6 months ago
- 55171ae dm: Emit the arch_cpu_init_dm() even only before relocation by Simon Glass · 1 year, 7 months ago
- 04d16be riscv: Support CONFIG_REMAKE_ELF by Samuel Holland · 1 year, 9 months ago
- 9a6569a riscv: Update alignment for some sections in linker scripts by Bin Meng · 1 year, 8 months ago
- 3f37baa riscv: spl: Remove relocation sections by Bin Meng · 1 year, 8 months ago
- 3c09ac2 riscv: Avoid updating the link register by Bin Meng · 1 year, 8 months ago
- 485f593 riscv: Change to use positive offset to access relocation entries by Bin Meng · 1 year, 8 months ago
- 0b1a3a2 riscv: Optimize loading relocation type by Bin Meng · 1 year, 8 months ago
- 883f553 riscv: Optimize source end address calculation in start.S by Bin Meng · 1 year, 8 months ago
- db9a7e5 riscv: Enforce DWARF4 output by Bin Meng · 1 year, 8 months ago
- 16f53be riscv: Correct a comment in io.h by Bin Meng · 1 year, 8 months ago
- f2d5244 riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree by Yanhong Wang · 1 year, 8 months ago
- c04dfc7 riscv: dts: jh7110: Add initial u-boot device tree by Yanhong Wang · 1 year, 8 months ago
- 9087a6a riscv: dts: jh7110: Add initial StarFive JH7110 device tree by Yanhong Wang · 1 year, 8 months ago
- 331ad93 board: starfive: Add TARGET_STARFIVE_VISIONFIVE2 to Kconfig by Yanhong Wang · 1 year, 8 months ago
- 2f5fad0 riscv: cpu: jh7110: Add Kconfig for StarFive JH7110 SoC by Yanhong Wang · 1 year, 8 months ago
- 2185341 riscv: cpu: jh7110: Add support for jh7110 SoC by Yanhong Wang · 1 year, 8 months ago
- 7400d34 riscv: semihosting: replace inline assembly with assembly file by Andre Przywara · 1 year, 10 months ago
- 5b197ee Merge tag 'v2023.04-rc3' into next by Tom Rini · 1 year, 9 months ago
- 7574b64 riscv: binman: Add help message for missing blobs by Rick Chen · 1 year, 9 months ago
- 8900e2b riscv: Rename Andes cpu and board names by Leo Yu-Chi Liang · 1 year, 9 months ago
- 487c211 configs: ae350: Enable v5l2 cache for AE350 platforms in SPL by Yu Chien Peter Lin · 1 year, 10 months ago
- 600a708 riscv: ax25: cache.c: Cleanups to L1/L2 cache function used in SPL by Yu Chien Peter Lin · 1 year, 10 months ago
- c1b8819 riscv: ae350: dts: Update L2 cache compatible string by Yu Chien Peter Lin · 1 year, 10 months ago
- d8a146d riscv: cpu: ax25: Simplify cache enabling logic in harts_early_init() by Yu Chien Peter Lin · 1 year, 10 months ago
- 55ca747 riscv: Remove redundant Kconfig "RISCV_NDS_CACHE" by Leo Yu-Chi Liang · 1 year, 10 months ago
- daf1312 riscv: global_data.h: Correct the comment for PLICSW by Yu Chien Peter Lin · 1 year, 10 months ago
- 8c103c3 dm: dts: Convert driver model tags to use new schema by Simon Glass · 1 year, 10 months ago
- 210af54 Correct SPL uses of LMB by Simon Glass · 1 year, 10 months ago
- 3c60e59 riscv: memcpy: check src and dst before copy by Rick Chen · 1 year, 11 months ago
- 5b71b7b riscv: ax25: bypass malloc when spl fit boots from ram by Rick Chen · 1 year, 11 months ago
- c83f64b riscv: ae350: Enable CCTL_SUEN by Rick Chen · 1 year, 11 months ago
- 81b56a5 riscv: cpu: check U-Mode before counteren write by Nikita Shubin · 2 years ago
- 6e7df1d global: Finish CONFIG -> CFG migration by Tom Rini · 1 year, 11 months ago
- cebdfc2 Merge branch 'next' by Tom Rini · 1 year, 11 months ago
- 3ec07c9 efi_loader: set IMAGE_FILE_LARGE_ADDRESS_AWARE by Heinrich Schuchardt · 1 year, 11 months ago
- 32b7e39 Convert CONFIG_STANDALONE_LOAD_ADDR to Kconfig by Tom Rini · 2 years ago
- ae3527f arch/riscv: add semihosting support for RISC-V by Kautuk Consul · 2 years ago
- 5c89467 riscv: clarify meaning of CONFIG_SBI_V02 by Heinrich Schuchardt · 2 years, 1 month ago
- c277c78 riscv: Fix detecting FPU support in standard extension by Yu Chien Peter Lin · 2 years, 1 month ago
- 3f35270 riscv: dts: fix the mpfs's reference clock frequency by Conor Dooley · 2 years, 1 month ago
- 0b8e6f8 riscv: dts: Add QSPI NAND device node by Padmarao Begari · 2 years, 1 month ago
- ab1644b riscv: dts: Update memory configuration by Padmarao Begari · 2 years, 1 month ago
- a5dfa3b riscv: Rename Andes PLIC to PLICSW by Yu Chien Peter Lin · 2 years, 1 month ago
- 9846390 Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE by Simon Glass · 2 years, 1 month ago
- bdb2383 riscv: andes_plic.c: use modified IPI scheme by Yu Chien Peter Lin · 2 years, 1 month ago
- e67f34f riscv: support building double-float modules by Heinrich Schuchardt · 2 years, 1 month ago
- 1dde977 riscv: Fix build against binutils 2.38 by Alexandre Ghiti · 2 years, 2 months ago WIP/2022-10-07-riscv-toolchain-update
- 8909066 dm: core: Drop ofnode_is_available() by Simon Glass · 2 years, 3 months ago