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gerrit.cesnet.cz / github / trini / u-boot / 7893d471945e45ed94bd250e03fa5bd70c178e06 / board / freescale / mpc8540ads / ddr.c
  1. b4983e1 fsl-ddr: use the 1T timing as default configuration by Dave Liu · 16 years ago
  2. dfb4910 Pass dimm parameters to populate populate controller options by Haiying Wang · 16 years ago
  3. 9617c8d FSL DDR: Convert MPC8540ADS to new DDR code. by Kumar Gala · 16 years ago