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gerrit.cesnet.cz / github / trini / u-boot / 47c0d79edc35fdd959851abcb3332bd5e702d0eb / arch / x86 / cpu / ivybridge
  1. 789fa27 x86: Remove HAVE_ACPI_RESUME by Bin Meng · 9 years ago
  2. d475d59 x86: Remove CPU_INTEL_SOCKET_RPGA989 by Bin Meng · 9 years ago
  3. efe2d80 x86: Clean up ivybridge/chrome Kconfig options by Bin Meng · 9 years ago
  4. 9bf76c2 x86: ivybridge: Remove NORTHBRIDGE_INTEL_SANDYBRIDGE by Bin Meng · 9 years ago
  5. 80af398 x86: Convert to use driver model timer by Bin Meng · 9 years ago
  6. 3e45de6 x86: ivybridge: Enable the MRC cache by Bin Meng · 9 years ago
  7. fd8f472 x86: ivybridge: Measure the MRC code execution time by Simon Glass · 9 years ago
  8. e9b3967 x86: ivybridge: Fix car_uninit() to correctly set run state by Simon Glass · 9 years ago
  9. 9fbc5cc x86: ivybridge: Check the RTC return value by Simon Glass · 9 years ago
  10. 53327d3 x86: ivybridge: Use 'ret' instead of 'rcode' by Simon Glass · 9 years ago
  11. 7b95252 x86: chromebook_link: Enable the debug UART by Simon Glass · 9 years ago
  12. c6c80d8 x86: ivybridge: Correct two typos for MRC by Bin Meng · 9 years ago
  13. 4b9f6a6 x86: Use struct mrc_region to describe a mrc region by Bin Meng · 9 years ago
  14. 42913a1 x86: ivybridge: Use APIs provided in the mrccache lib by Bin Meng · 9 years ago
  15. f6220f1 x86: Move mrccache.[c|h] to a common place by Bin Meng · 9 years ago
  16. 5bf9359 x86: ivybridge: Remove the dead codes that programs pci bridge by Bin Meng · 9 years ago
  17. 93f8a31 x86: Enable DM RTC support for all x86 boards by Bin Meng · 9 years ago
  18. b0c8f4a Kill unneeded #include <linux/kconfig.h> by Masahiro Yamada · 9 years ago
  19. 63d54a6 x86: Clean up lapic codes by Bin Meng · 9 years ago
  20. 946c2b5 x86: ivybridge: Remove SMP from CPU_SPECIFIC_OPTIONS by Bin Meng · 9 years ago
  21. 45b5a37 x86: Add multi-processor init by Simon Glass · 10 years ago
  22. 5021c81 x86: ivybridge: Use reset_cpu() by Simon Glass · 10 years ago
  23. 90b16d1 x86: chromebook_link: dts: Add PCH and LPC devices by Simon Glass · 10 years ago
  24. 452f548 dm: x86: Add a uclass for a Platform Controller Hub by Simon Glass · 10 years ago
  25. ba45756 dm: x86: spi: Convert ICH SPI driver to driver model by Simon Glass · 10 years ago
  26. aad78d2 dm: x86: pci: Convert chromebook_link to use driver model for pci by Simon Glass · 10 years ago
  27. 161d2e4 x86: Split up arch_cpu_init() by Simon Glass · 10 years ago
  28. 31f57c2 x86: Add a x86_ prefix to the x86-specific PCI functions by Simon Glass · 10 years ago
  29. bc17d8f x86: video: Allow video ROM execution to fall back to the other method by Simon Glass · 10 years ago
  30. 2d934e5 x86: Rename MMCONF_BASE_ADDRESS and make it common across x86 by Simon Glass · 10 years ago
  31. 380ab5c x86: ivybridge: Drop the Kconfig MRC cache information by Simon Glass · 10 years ago
  32. 191c008 x86: Implement a cache for Memory Reference Code parameters by Simon Glass · 10 years ago
  33. c72f74e x86: ivybridge: Update microcode early in boot by Simon Glass · 10 years ago
  34. 7b00896 x86: ivybridge: Add a way to turn off the CAR by Simon Glass · 10 years ago
  35. aaafcd6 x86: ivybridge: Request MTRRs for DRAM regions by Simon Glass · 10 years ago
  36. 9818a00 x86: ivybridge: Set up an MTRR for the video frame buffer by Simon Glass · 10 years ago
  37. aff2523 x86: Add support for MTRRs by Simon Glass · 10 years ago
  38. 3a5659f x86: ivybridge: Drop support for ROM caching by Simon Glass · 10 years ago
  39. d19ee5c x86: ivybridge: Only run the Video BIOS when video is enabled by Simon Glass · 10 years ago
  40. 8c5224c x86: Use consistent name XXX_ADDR for binary blob flash address by Bin Meng · 10 years ago
  41. b591ee3 x86: Correct problems in the microcode loading by Simon Glass · 10 years ago
  42. cf29e3e x86: ivybridge: Update the microcode by Simon Glass · 10 years ago
  43. 95a5a47 x86: Add post failure codes for bist and car by Bin Meng · 10 years ago
  44. effcf06 x86: Add initial video device init for Intel GMA by Simon Glass · 10 years ago
  45. 2477427 x86: ivybridge: Add northbridge init functions by Simon Glass · 10 years ago
  46. bb80be3 x86: Add init for model 206AX CPU by Simon Glass · 10 years ago
  47. a6d4c45 x86: ivybridge: Set up XHCI USB by Simon Glass · 10 years ago
  48. 9baeca4 x86: ivybridge: Set up EHCI USB by Simon Glass · 10 years ago
  49. 3ac8393 x86: ivybridge: Add SATA init by Simon Glass · 10 years ago
  50. 72cd085 x86: ivybridge: Add additional LPC init by Simon Glass · 10 years ago
  51. 8c74a57 x86: ivybridge: Add PCH init by Simon Glass · 10 years ago
  52. 4e7a6ac x86: ivybridge: Add support for BD82x6x PCH by Simon Glass · 10 years ago
  53. 65dd74a x86: ivybridge: Implement SDRAM init by Simon Glass · 10 years ago
  54. 3eafce0 x86: ivybridge: Add LAPIC support by Simon Glass · 10 years ago
  55. 8e0df06 x86: ivybridge: Add early init for PCH devices by Simon Glass · 10 years ago
  56. 77f9b1f x86: ivybridge: Perform Intel microcode update on boot by Simon Glass · 10 years ago
  57. 94060ff x86: ivybridge: Check BIST value on boot by Simon Glass · 10 years ago
  58. f5fbbe9 x86: ivybridge: Perform initial CPU setup by Simon Glass · 10 years ago
  59. 2b60515 x86: ivybridge: Add early LPC init so that serial works by Simon Glass · 10 years ago
  60. 6e5b12b x86: ivybridge: Enable PCI in early init by Simon Glass · 10 years ago
  61. 70a09c6 x86: chromebook_link: Implement CAR support (cache as RAM) by Simon Glass · 10 years ago
  62. 8ef0757 x86: Add chromebook_link board by Simon Glass · 10 years ago