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gerrit.cesnet.cz / github / trini / u-boot / 36e5f7ce1c64b4fa0a12c82f84086f5be560b706 / arch / arm / mach-zynq / slcr.c
  1. 0107f24 ARM: zynq: move SoC sources to mach-zynq by Masahiro Yamada · 10 years ago[Renamed from arch/arm/cpu/armv7/zynq/slcr.c]
  2. f25f552 zynq: slcr: Disable all level shifters by Siva Durga Prasad Paladugu · 10 years ago
  3. f60c6fb ARM: zynq: slcr: Dont modify the reserved bits by Siva Durga Prasad Paladugu · 10 years ago
  4. eb8c54b ARM: zynq: ehci: Added USB host driver support by Michal Simek · 11 years ago
  5. 3cc3fa8 ARM: zynq: Add MIO detection code by Michal Simek · 11 years ago
  6. 2da7a74 ARM: zynq: Setup correct slcr_lock value by Michal Simek · 11 years ago
  7. 6e04769 ARM: zynq: slcr: Fix incorrect commentary by Michal Simek · 11 years ago
  8. 3b5b599 ARM: zynq: Fix sparse warnings in slcr.c by Michal Simek · 11 years ago
  9. 97598fc net: zynq_gem: Calculate clock dividers dynamically by Soren Brinkmann · 11 years ago
  10. 1cd46ed net: zynq_gem: Move RCLK details out of driver by Soren Brinkmann · 11 years ago
  11. b3de924 zynq: Add support to find bootmode by Jagannadha Sutradharudu Teki · 11 years ago
  12. 39523be zynq: slcr: Wait 100ms till clk is properly setup by Michal Simek · 12 years ago
  13. 1a45966 Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · 11 years ago
  14. d5dae85 fpga: zynq: Add support for loading bitstream by Michal Simek · 12 years ago
  15. 8024352 net: gem: Fix gem driver on 1Gbps LAN by Michal Simek · 12 years ago
  16. 59c651f arm: zynq: Add SLCR support with system reset by Michal Simek · 12 years ago