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gerrit.cesnet.cz / github / trini / u-boot / 1e23737df8c3887afd45b3c9842827df168d915b / board / altera / cyclone5-socdk / qts / pll_config.h
  1. 4baca92 arm: socfpga: Update iomux and pll for c5 socdk RevE by Dinh Nguyen · 8 years ago
  2. caee45e arm: socfpga: Fix QSPI doesn't work on socdk board by shengjiangwu · 9 years ago
  3. b0808b9 arm: socfpga: Fix emac1 doesn't work on socdk board by shengjiangwu · 9 years ago
  4. f6badb0d arm: socfpga: Switch to filtered QTS files by Marek Vasut · 9 years ago
  5. f089240 arm: socfpga: Split Altera socfpga into AV and CV SoCDK by Marek Vasut · 9 years ago[Copied from board/altera/socfpga/qts/pll_config.h]
  6. 9617ceb arm: socfpga: Move generated files into qts subdir by Marek Vasut · 9 years ago[Renamed from board/altera/socfpga/pll_config.h]
  7. 8b73dda arm: socfpga: spl: update peripheral pll for dev kit by Dinh Nguyen · 10 years ago
  8. 0d13a00 arm: socfpga: Sync Cyclone V DK PLL configuration by Marek Vasut · 10 years ago
  9. 0911af0 arm: socfpga: clock: Add missing stubs into board file by Marek Vasut · 10 years ago
  10. ddfeb0a socfpga: Adding Clock Manager driver by Chin Liang See · 11 years ago