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wdenk2e5983d2003-07-15 20:04:06 +00001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28/*
29 * CPU specific code
30 */
31
32#include <common.h>
33#include <command.h>
34#include <arm925t.h>
35
36/* read co-processor 15, register #1 (control register) */
37static unsigned long read_p15_c1 (void)
38{
39 unsigned long value;
40
41 __asm__ __volatile__(
42 "mrc p15, 0, %0, c1, c0, 0 @ read control reg\n"
43 : "=r" (value)
44 :
45 : "memory");
46
47#ifdef MMU_DEBUG
48 printf ("p15/c1 is = %08lx\n", value);
49#endif
50 return value;
51}
52
53/* write to co-processor 15, register #1 (control register) */
54static void write_p15_c1 (unsigned long value)
55{
56#ifdef MMU_DEBUG
57 printf ("write %08lx to p15/c1\n", value);
58#endif
59 __asm__ __volatile__(
60 "mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
61 :
62 : "r" (value)
63 : "memory");
64
65 read_p15_c1 ();
66}
67
68static void cp_delay (void)
69{
70 volatile int i;
71
72 /* Many OMAP regs need at least 2 nops */
73 for (i = 0; i < 100; i++);
74}
75
76/* See also ARM Ref. Man. */
77#define C1_MMU (1<<0) /* mmu off/on */
78#define C1_ALIGN (1<<1) /* alignment faults off/on */
79#define C1_DC (1<<2) /* dcache off/on */
80#define C1_WB (1<<3) /* merging write buffer on/off */
81#define C1_BIG_ENDIAN (1<<7) /* big endian off/on */
82#define C1_SYS_PROT (1<<8) /* system protection */
83#define C1_ROM_PROT (1<<9) /* ROM protection */
84#define C1_IC (1<<12) /* icache off/on */
85#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */
86#define RESERVED_1 (0xf << 3) /* must be 111b for R/W */
87
88int cpu_init (void)
89{
90 /*
wdenka8c7c702003-12-06 19:49:23 +000091 * setup up stacks if necessary
wdenk2e5983d2003-07-15 20:04:06 +000092 */
93#ifdef CONFIG_USE_IRQ
wdenka8c7c702003-12-06 19:49:23 +000094 DECLARE_GLOBAL_DATA_PTR;
95
96 IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_LEN - 4;
97 FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
98#endif
99 return 0;
wdenk2e5983d2003-07-15 20:04:06 +0000100}
101
102int cleanup_before_linux (void)
103{
104 /*
105 * this function is called just before we call linux
106 * it prepares the processor for linux
107 *
108 * we turn off caches etc ...
109 */
110
111 unsigned long i;
112
113 disable_interrupts ();
114
115 /* turn off I/D-cache */
116 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
117 i &= ~(C1_DC | C1_IC);
118 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
119
120 /* flush I/D-cache */
121 i = 0;
122 asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));
123 return (0);
124}
125
126int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
127{
128 extern void reset_cpu (ulong addr);
129
130 disable_interrupts ();
131 reset_cpu (0);
132 /*NOTREACHED*/
133 return (0);
134}
135
136void icache_enable (void)
137{
138 ulong reg;
139
140 reg = read_p15_c1 (); /* get control reg. */
141 cp_delay ();
142 write_p15_c1 (reg | C1_IC);
143}
144
145void icache_disable (void)
146{
147 ulong reg;
148
149 reg = read_p15_c1 ();
150 cp_delay ();
151 write_p15_c1 (reg & ~C1_IC);
152}
153
154int icache_status (void)
155{
156 return (read_p15_c1 () & C1_IC) != 0;
157}