blob: f63366bb0e6336614c73fd0d4b9d7ba5b30ec6ac [file] [log] [blame]
Shengzhou Liu4d666682014-04-18 16:43:40 +08001/* Copyright 2013 Freescale Semiconductor, Inc.
2 *
3 * SPDX-License-Identifier: GPL-2.0+
4 */
5
6#include <common.h>
Simon Glass24b852a2015-11-08 23:47:45 -07007#include <console.h>
Shengzhou Liu4d666682014-04-18 16:43:40 +08008#include <malloc.h>
9#include <ns16550.h>
10#include <nand.h>
11#include <i2c.h>
12#include <mmc.h>
13#include <fsl_esdhc.h>
14#include <spi_flash.h>
15
16DECLARE_GLOBAL_DATA_PTR;
17
18phys_size_t get_effective_memsize(void)
19{
20 return CONFIG_SYS_L3_SIZE;
21}
22
23unsigned long get_board_sys_clk(void)
24{
25 return CONFIG_SYS_CLK_FREQ;
26}
27
28unsigned long get_board_ddr_clk(void)
29{
30 return CONFIG_DDR_CLK_FREQ;
31}
32
33void board_init_f(ulong bootflag)
34{
35 u32 plat_ratio, sys_clk, ccb_clk;
36 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
37
38 /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
39 memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
40
41 /* Update GD pointer */
42 gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
43
44 console_init_f();
45
46 /* initialize selected port with appropriate baud rate */
47 sys_clk = get_board_sys_clk();
48 plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
49 ccb_clk = sys_clk * plat_ratio / 2;
50
51 NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
52 ccb_clk / 16 / CONFIG_BAUDRATE);
53
54#if defined(CONFIG_SPL_MMC_BOOT)
55 puts("\nSD boot...\n");
56#elif defined(CONFIG_SPL_SPI_BOOT)
57 puts("\nSPI boot...\n");
58#elif defined(CONFIG_SPL_NAND_BOOT)
59 puts("\nNAND boot...\n");
60#endif
61
62 relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
63}
64
65void board_init_r(gd_t *gd, ulong dest_addr)
66{
67 bd_t *bd;
68
69 bd = (bd_t *)(gd + sizeof(gd_t));
70 memset(bd, 0, sizeof(bd_t));
71 gd->bd = bd;
72 bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
73 bd->bi_memsize = CONFIG_SYS_L3_SIZE;
74
75 probecpu();
76 get_clocks();
77 mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
78 CONFIG_SPL_RELOC_MALLOC_SIZE);
79
80#ifdef CONFIG_SPL_NAND_BOOT
81 nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
82 (uchar *)CONFIG_ENV_ADDR);
83#endif
84#ifdef CONFIG_SPL_MMC_BOOT
85 mmc_initialize(bd);
86 mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
87 (uchar *)CONFIG_ENV_ADDR);
88#endif
89#ifdef CONFIG_SPL_SPI_BOOT
90 spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
91 (uchar *)CONFIG_ENV_ADDR);
92#endif
93
94 gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
95 gd->env_valid = 1;
96
97 i2c_init_all();
98
99 gd->ram_size = initdram(0);
100
101#ifdef CONFIG_SPL_MMC_BOOT
102 mmc_boot();
103#elif defined(CONFIG_SPL_SPI_BOOT)
104 spi_boot();
105#elif defined(CONFIG_SPL_NAND_BOOT)
106 nand_boot();
107#endif
108}