| Stephen Warren | 10a0338 | 2016-05-12 13:32:56 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013-2016, NVIDIA CORPORATION. |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0 |
| 5 | */ |
| 6 | |
| 7 | #ifndef _P2771_0000_H |
| 8 | #define _P2771_0000_H |
| 9 | |
| 10 | #include <linux/sizes.h> |
| 11 | |
| 12 | #include "tegra186-common.h" |
| 13 | |
| 14 | /* High-level configuration options */ |
| 15 | #define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2771-0000" |
| 16 | |
| Bryan Wu | ad3c144 | 2016-07-27 15:48:22 -0600 | [diff] [blame] | 17 | /* I2C */ |
| 18 | #define CONFIG_SYS_I2C_TEGRA |
| 19 | |
| Stephen Warren | 10a0338 | 2016-05-12 13:32:56 -0600 | [diff] [blame] | 20 | /* Environment in eMMC, at the end of 2nd "boot sector" */ |
| Stephen Warren | 10a0338 | 2016-05-12 13:32:56 -0600 | [diff] [blame] | 21 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| 22 | #define CONFIG_SYS_MMC_ENV_PART 2 |
| 23 | #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) |
| 24 | |
| Stephen Warren | a6bb008 | 2016-07-29 13:15:06 -0600 | [diff] [blame] | 25 | /* PCI host support */ |
| Stephen Warren | a6bb008 | 2016-07-29 13:15:06 -0600 | [diff] [blame] | 26 | |
| Stephen Warren | 10a0338 | 2016-05-12 13:32:56 -0600 | [diff] [blame] | 27 | #include "tegra-common-post.h" |
| 28 | |
| 29 | /* Crystal is 38.4MHz. clk_m runs at half that rate */ |
| 30 | #define COUNTER_FREQUENCY 19200000 |
| 31 | |
| Stephen Warren | a9819b9 | 2018-01-03 14:32:35 -0700 | [diff] [blame] | 32 | #undef CONFIG_NR_DRAM_BANKS |
| 33 | #define CONFIG_NR_DRAM_BANKS (1024 + 2) |
| 34 | |
| Stephen Warren | 10a0338 | 2016-05-12 13:32:56 -0600 | [diff] [blame] | 35 | #endif |