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Stefan Roese0d974d52007-03-24 15:57:09 +01001/*
2 * (C) Copyright 2007
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
Stefan Roeseaee747f2007-11-15 14:23:55 +010024#ifndef __ASM_PPC_GPIO_H
25#define __ASM_PPC_GPIO_H
26
Stefan Roese0d974d52007-03-24 15:57:09 +010027/* 4xx PPC's have 2 GPIO controllers */
28#if defined(CONFIG_405EZ) || \
29 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
30 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
31#define GPIO_GROUP_MAX 2
32#else
33#define GPIO_GROUP_MAX 1
34#endif
35
Stefan Roeseaee747f2007-11-15 14:23:55 +010036/* Offsets */
37#define GPIOx_OR 0x00 /* GPIO Output Register */
38#define GPIOx_TCR 0x04 /* GPIO Three-State Control Register */
39#define GPIOx_OSL 0x08 /* GPIO Output Select Register (Bits 0-31) */
40#define GPIOx_OSH 0x0C /* GPIO Ouput Select Register (Bits 32-63) */
41#define GPIOx_TSL 0x10 /* GPIO Three-State Select Register (Bits 0-31) */
42#define GPIOx_TSH 0x14 /* GPIO Three-State Select Register (Bits 32-63) */
43#define GPIOx_ODR 0x18 /* GPIO Open drain Register */
44#define GPIOx_IR 0x1C /* GPIO Input Register */
45#define GPIOx_RR1 0x20 /* GPIO Receive Register 1 */
46#define GPIOx_RR2 0x24 /* GPIO Receive Register 2 */
47#define GPIOx_RR3 0x28 /* GPIO Receive Register 3 */
48#define GPIOx_IS1L 0x30 /* GPIO Input Select Register 1 (Bits 0-31) */
49#define GPIOx_IS1H 0x34 /* GPIO Input Select Register 1 (Bits 32-63) */
50#define GPIOx_IS2L 0x38 /* GPIO Input Select Register 2 (Bits 0-31) */
51#define GPIOx_IS2H 0x3C /* GPIO Input Select Register 2 (Bits 32-63) */
52#define GPIOx_IS3L 0x40 /* GPIO Input Select Register 3 (Bits 0-31) */
53#define GPIOx_IS3H 0x44 /* GPIO Input Select Register 3 (Bits 32-63) */
54
55#define GPIO_OR(x) (x+GPIOx_OR) /* GPIO Output Register */
56#define GPIO_TCR(x) (x+GPIOx_TCR) /* GPIO Three-State Control Register */
57#define GPIO_OS(x) (x+GPIOx_OSL) /* GPIO Output Select Register High or Low */
58#define GPIO_TS(x) (x+GPIOx_TSL) /* GPIO Three-state Control Reg High or Low */
59#define GPIO_IS1(x) (x+GPIOx_IS1L) /* GPIO Input register1 High or Low */
60#define GPIO_IS2(x) (x+GPIOx_IS2L) /* GPIO Input register2 High or Low */
61#define GPIO_IS3(x) (x+GPIOx_IS3L) /* GPIO Input register3 High or Low */
62
63#define GPIO0 0
64#define GPIO1 1
65
Stefan Roese0d974d52007-03-24 15:57:09 +010066#define GPIO_MAX 32
67#define GPIO_ALT1_SEL 0x40000000
68#define GPIO_ALT2_SEL 0x80000000
69#define GPIO_ALT3_SEL 0xc0000000
70#define GPIO_IN_SEL 0x40000000
71#define GPIO_MASK 0xc0000000
72
73#define GPIO_VAL(gpio) (0x80000000 >> (gpio))
74
75#ifndef __ASSEMBLY__
76typedef enum gpio_select { GPIO_SEL, GPIO_ALT1, GPIO_ALT2, GPIO_ALT3 } gpio_select_t;
77typedef enum gpio_driver { GPIO_DIS, GPIO_IN, GPIO_OUT, GPIO_BI } gpio_driver_t;
78typedef enum gpio_out { GPIO_OUT_0, GPIO_OUT_1, GPIO_OUT_NO_CHG } gpio_out_t;
79
80typedef struct {
Stefan Roese85f73732007-06-15 07:39:43 +020081 unsigned long add; /* gpio core base address */
82 gpio_driver_t in_out; /* Driver Setting */
83 gpio_select_t alt_nb; /* Selected Alternate */
84 gpio_out_t out_val;/* Default Output Value */
Stefan Roese0d974d52007-03-24 15:57:09 +010085} gpio_param_s;
86#endif
87
88void gpio_config(int pin, int in_out, int gpio_alt, int out_val);
89void gpio_write_bit(int pin, int val);
Stefan Roese85f73732007-06-15 07:39:43 +020090int gpio_read_out_bit(int pin);
Lawrence R. Johnson5ab884b2008-01-03 18:54:00 -050091int gpio_read_in_bit(int pin);
Stefan Roese0d974d52007-03-24 15:57:09 +010092void gpio_set_chip_configuration(void);
Stefan Roeseaee747f2007-11-15 14:23:55 +010093
94#endif /* __ASM_PPC_GPIO_H */