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Andrej Rosano3bf801a2015-04-08 18:56:30 +02001/*
2 * USB armory MkI board configuration settings
3 * http://inversepath.com/usbarmory
4 *
5 * Copyright (C) 2015, Inverse Path
6 * Andrej Rosano <andrej@inversepath.com>
7 *
8 * SPDX-License-Identifier:|____GPL-2.0+
9 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14#define CONFIG_MX53
15#define CONFIG_DISPLAY_CPUINFO
16#define CONFIG_DISPLAY_BOARDINFO
Gong Qianyu18fb0e32015-10-26 19:47:42 +080017#define CONFIG_SYS_FSL_CLK
Andrej Rosano3bf801a2015-04-08 18:56:30 +020018#define CONFIG_BOARD_EARLY_INIT_F
Andrej Rosano3bf801a2015-04-08 18:56:30 +020019#define CONFIG_MXC_GPIO
20
21#include <asm/arch/imx-regs.h>
Andrej Rosano3bf801a2015-04-08 18:56:30 +020022
23#include <config_distro_defaults.h>
24
25/* U-Boot commands */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020026
27/* U-Boot environment */
28#define CONFIG_ENV_OVERWRITE
29#define CONFIG_SYS_NO_FLASH
30#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
31#define CONFIG_ENV_SIZE (8 * 1024)
32#define CONFIG_ENV_IS_IN_MMC
33#define CONFIG_SYS_MMC_ENV_DEV 0
34
35/* U-Boot general configurations */
36#define CONFIG_SYS_CBSIZE 512
37#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
38#define CONFIG_SYS_MAXARGS 16
39#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
40
41/* UART */
42#define CONFIG_MXC_UART
43#define CONFIG_MXC_UART_BASE UART1_BASE
44#define CONFIG_CONS_INDEX 1
45#define CONFIG_BAUDRATE 115200
46
47/* SD/MMC */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020048#define CONFIG_FSL_ESDHC
49#define CONFIG_SYS_FSL_ESDHC_ADDR 0
50#define CONFIG_SYS_FSL_ESDHC_NUM 1
51#define CONFIG_MMC
52#define CONFIG_GENERIC_MMC
53
54/* USB */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020055#define CONFIG_USB_EHCI
56#define CONFIG_USB_EHCI_MX5
57#define CONFIG_USB_STORAGE
58#define CONFIG_MXC_USB_PORT 1
59#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
60#define CONFIG_MXC_USB_FLAGS 0
61
62/* I2C */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020063#define CONFIG_SYS_I2C
64#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020065#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
66#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020067
68/* Fuse */
69#define CONFIG_CMD_FUSE
70#define CONFIG_FSL_IIM
71
Andrej Rosano9a45ec32016-06-20 17:21:48 +020072/* U-Boot memory offsets */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020073#define CONFIG_LOADADDR 0x72000000
74#define CONFIG_SYS_TEXT_BASE 0x77800000
75#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
Andrej Rosano9a45ec32016-06-20 17:21:48 +020076
77/* Linux boot */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020078#define CONFIG_HOSTNAME usbarmory
79#define CONFIG_BOOTCOMMAND \
80 "run distro_bootcmd; " \
81 "setenv bootargs console=${console} ${bootargs_default}; " \
Andrej Rosano9a45ec32016-06-20 17:21:48 +020082 "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \
Andrej Rosano3bf801a2015-04-08 18:56:30 +020083 "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \
Andrej Rosano9a45ec32016-06-20 17:21:48 +020084 "bootz ${kernel_addr_r} - ${fdt_addr_r}"
Andrej Rosano3bf801a2015-04-08 18:56:30 +020085
86#define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0)
87
88#include <config_distro_bootcmd.h>
89
90#define MEM_LAYOUT_ENV_SETTINGS \
91 "kernel_addr_r=0x70800000\0" \
92 "fdt_addr_r=0x71000000\0" \
93 "scriptaddr=0x70800000\0" \
94 "pxefile_addr_r=0x70800000\0" \
95 "ramdisk_addr_r=0x73000000\0"
96
97#define CONFIG_EXTRA_ENV_SETTINGS \
98 MEM_LAYOUT_ENV_SETTINGS \
99 "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \
100 "fdtfile=imx53-usbarmory.dtb\0" \
101 "console=ttymxc0,115200\0" \
102 BOOTENV
103
104/* Physical Memory Map */
105#define CONFIG_NR_DRAM_BANKS 1
106#define PHYS_SDRAM CSD0_BASE_ADDR
107#define PHYS_SDRAM_SIZE (gd->ram_size)
108
109#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
110#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
111#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
112
113#define CONFIG_SYS_INIT_SP_OFFSET \
114 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
115#define CONFIG_SYS_INIT_SP_ADDR \
116 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
117
118#define CONFIG_SYS_MEMTEST_START 0x70000000
119#define CONFIG_SYS_MEMTEST_END 0x90000000
120
121#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
122
123#endif /* __CONFIG_H */