blob: 48dfc8c4358abb47a7ec4dd0749525bf84494970 [file] [log] [blame]
Matt Waddelb80e41a2010-10-07 15:48:45 -06001/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
8 *
9 * (C) Copyright 2003
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
12 *
13 * (C) Copyright 2004
14 * ARM Ltd.
15 * Philippe Robin, <philippe.robin@arm.com>
16 *
17 * See file CREDITS for list of people who contributed to this
18 * project.
19 *
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License as
22 * published by the Free Software Foundation; either version 2 of
23 * the License, or (at your option) any later version.
24 *
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
29 *
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 * MA 02111-1307 USA
34 */
35#include <common.h>
36#include <netdev.h>
37#include <asm/io.h>
38#include <asm/arch/systimer.h>
39#include <asm/arch/sysctrl.h>
40#include <asm/arch/wdt.h>
41
42static ulong timestamp;
43static ulong lastdec;
44
45static struct wdt *wdt_base = (struct wdt *)WDT_BASE;
46static struct systimer *systimer_base = (struct systimer *)SYSTIMER_BASE;
47static struct sysctrl *sysctrl_base = (struct sysctrl *)SCTL_BASE;
48
49static void flash__init(void);
50static void vexpress_timer_init(void);
51DECLARE_GLOBAL_DATA_PTR;
52
53#if defined(CONFIG_SHOW_BOOT_PROGRESS)
54void show_boot_progress(int progress)
55{
56 printf("Boot reached stage %d\n", progress);
57}
58#endif
59
60static inline void delay(ulong loops)
61{
62 __asm__ volatile ("1:\n"
63 "subs %0, %1, #1\n"
64 "bne 1b" : "=r" (loops) : "0" (loops));
65}
66
67int board_init(void)
68{
69 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
70 gd->bd->bi_arch_number = MACH_TYPE_VEXPRESS;
71 gd->flags = 0;
72
73 icache_enable();
74 flash__init();
75 vexpress_timer_init();
76
77 return 0;
78}
79
80int board_eth_init(bd_t *bis)
81{
82 int rc = 0;
83#ifdef CONFIG_SMC911X
84 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
85#endif
86 return rc;
87}
88
89static void flash__init(void)
90{
91 /* Setup the sytem control register to allow writing to flash */
92 writel(readl(&sysctrl_base->scflashctrl) | VEXPRESS_FLASHPROG_FLVPPEN,
93 &sysctrl_base->scflashctrl);
94}
95
96int dram_init(void)
97{
98 gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE);
99 return 0;
100}
101
102void dram_init_banksize(void)
103{
104 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
105 gd->bd->bi_dram[0].size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
106 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
107 gd->bd->bi_dram[1].size = get_ram_size(PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
108}
109
110int timer_init(void)
111{
112 return 0;
113}
114
115/*
116 * Start timer:
117 * Setup a 32 bit timer, running at 1KHz
118 * Versatile Express Motherboard provides 1 MHz timer
119 */
120static void vexpress_timer_init(void)
121{
122 /*
123 * Set clock frequency in system controller:
124 * VEXPRESS_REFCLK is 32KHz
125 * VEXPRESS_TIMCLK is 1MHz
126 */
127 writel(SP810_TIMER0_ENSEL | SP810_TIMER1_ENSEL |
128 SP810_TIMER2_ENSEL | SP810_TIMER3_ENSEL |
129 readl(&sysctrl_base->scctrl), &sysctrl_base->scctrl);
130
131 /*
132 * Set Timer0 to be:
133 * Enabled, free running, no interrupt, 32-bit, wrapping
134 */
135 writel(SYSTIMER_RELOAD, &systimer_base->timer0load);
136 writel(SYSTIMER_RELOAD, &systimer_base->timer0value);
137 writel(SYSTIMER_EN | SYSTIMER_32BIT | \
138 readl(&systimer_base->timer0control), \
139 &systimer_base->timer0control);
140
141 reset_timer_masked();
142}
143
144/* Use the ARM Watchdog System to cause reset */
145void reset_cpu(ulong addr)
146{
147 writeb(WDT_EN, &wdt_base->wdogcontrol);
148 writel(WDT_RESET_LOAD, &wdt_base->wdogload);
149 while (1)
150 ;
151}
152
153/*
154 * Delay x useconds AND perserve advance timstamp value
155 * assumes timer is ticking at 1 msec
156 */
157void udelay(ulong usec)
158{
159 ulong tmo, tmp;
160
161 tmo = usec / 1000;
162 tmp = get_timer(0); /* get current timestamp */
163
164 /*
165 * If setting this forward will roll time stamp then
166 * reset "advancing" timestamp to 0 and set lastdec value
167 * otherwise set the advancing stamp to the wake up time
168 */
169 if ((tmo + tmp + 1) < tmp)
170 reset_timer_masked();
171 else
172 tmo += tmp;
173
174 while (get_timer_masked() < tmo)
175 ; /* loop till wakeup event */
176}
177
178ulong get_timer(ulong base)
179{
180 return get_timer_masked() - base;
181}
182
183void reset_timer_masked(void)
184{
185 lastdec = readl(&systimer_base->timer0value) / 1000;
186 timestamp = 0;
187}
188
189void reset_timer(void)
190{
191 reset_timer_masked();
192}
193
194ulong get_timer_masked(void)
195{
196 ulong now = readl(&systimer_base->timer0value) / 1000;
197
198 if (lastdec >= now) { /* normal mode (non roll) */
199 timestamp += lastdec - now;
200 } else { /* count down timer overflowed */
201 /*
202 * nts = ts + ld - now
203 * ts = old stamp, ld = time before passing through - 1
204 * now = amount of time after passing though - 1
205 * nts = new "advancing time stamp"
206 */
207 timestamp += lastdec + SYSTIMER_RELOAD - now;
208 }
209 lastdec = now;
210
211 return timestamp;
212}
213
214void lowlevel_init(void)
215{
216}
217
218ulong get_board_rev(void){
219 return readl((u32 *)SYS_ID);
220}